Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751255AbdL3NxP (ORCPT ); Sat, 30 Dec 2017 08:53:15 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:35042 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750950AbdL3Nvd (ORCPT ); Sat, 30 Dec 2017 08:51:33 -0500 From: Paul Cercueil To: Ralf Baechle , Rob Herring , Mark Rutland , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-mips@linux-mips.org, linux-kernel@vger.kernel.org, linux-watchdog@vger.kernel.org, Paul Cercueil Subject: [PATCH v2 1/8] watchdog: JZ4740: Disable clock after stopping counter Date: Sat, 30 Dec 2017 14:51:01 +0100 Message-Id: <20171230135108.6834-1-paul@crapouillou.net> In-Reply-To: <20171228162939.3928-2-paul@crapouillou.net> References: <20171228162939.3928-2-paul@crapouillou.net> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 814 Lines: 27 Previously, the clock was disabled first, which makes the watchdog component insensitive to register writes. Signed-off-by: Paul Cercueil Reviewed-by: Guenter Roeck --- drivers/watchdog/jz4740_wdt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) v2: No change diff --git a/drivers/watchdog/jz4740_wdt.c b/drivers/watchdog/jz4740_wdt.c index 20627f22baf6..6955deb100ef 100644 --- a/drivers/watchdog/jz4740_wdt.c +++ b/drivers/watchdog/jz4740_wdt.c @@ -124,8 +124,8 @@ static int jz4740_wdt_stop(struct watchdog_device *wdt_dev) { struct jz4740_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev); - jz4740_timer_disable_watchdog(); writeb(0x0, drvdata->base + JZ_REG_WDT_COUNTER_ENABLE); + jz4740_timer_disable_watchdog(); return 0; } -- 2.11.0