Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751100AbdLaWfK (ORCPT ); Sun, 31 Dec 2017 17:35:10 -0500 Received: from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]:36039 "EHLO mail-out-1.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751053AbdLaWfJ (ORCPT ); Sun, 31 Dec 2017 17:35:09 -0500 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: =?us-ascii?q?A2CECQA+ZUla/54agoZdHQEBBQELAYM+Z?= =?us-ascii?q?oEbB4QAmTuZK4IVCiOFGIQyQBcBAQEBAQEBAQFrKIVNBAsBRjUCJgJfCgQFii4?= =?us-ascii?q?EDK5SgW06iEqBZQEBAQEBBQEBAQEBHgUJAYEFgn2CEoM/KYY1GIIigg4MMYJlB?= =?us-ascii?q?YpIiUiPPIEThnCPSYl9KYdAjSSJMgICAgIJAhqBPCEBNoFPcIJ6glQcgWh3AYg?= =?us-ascii?q?aAYEVAQEB?= X-IPAS-Result: =?us-ascii?q?A2CECQA+ZUla/54agoZdHQEBBQELAYM+ZoEbB4QAmTuZK4I?= =?us-ascii?q?VCiOFGIQyQBcBAQEBAQEBAQFrKIVNBAsBRjUCJgJfCgQFii4EDK5SgW06iEqBZ?= =?us-ascii?q?QEBAQEBBQEBAQEBHgUJAYEFgn2CEoM/KYY1GIIigg4MMYJlBYpIiUiPPIEThnC?= =?us-ascii?q?PSYl9KYdAjSSJMgICAgIJAhqBPCEBNoFPcIJ6glQcgWh3AYgaAYEVAQEB?= X-IronPort-AV: E=Sophos;i="5.45,488,1508796000"; d="scan'208";a="31486628" From: =?UTF-8?q?Stefan=20Br=C3=BCns?= To: CC: =?UTF-8?q?Stefan=20Br=C3=BCns?= , "Jani Nikula" , , Rodrigo Vivi , , "David Airlie" , Joonas Lahtinen Subject: [PATCH v2] drm/i915: Try EDID bitbanging on HDMI after failed read Date: Sun, 31 Dec 2017 23:34:54 +0100 X-Mailer: git-send-email 2.15.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [77.182.71.79] X-ClientProxiedBy: rwthex-w2-b.rwth-ad.de (2002:8682:1a9f::8682:1a9f) To rwthex-w2-a.rwth-ad.de (2002:8682:1a9e::8682:1a9e) Message-ID: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2273 Lines: 62 The ACK/NACK implementation as found in e.g. the G965 has the falling clock edge and the release of the data line after the ACK for the received byte happen at the same time. This is conformant with the I2C specification, which allows a zero hold time, see footnote [3]: "A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the V IH(min) of the SCL signal) to bridge the undefined region of the falling edge of SCL." Some HDMI-to-VGA converters apparently fail to adhere to this requirement and latch SDA at the falling clock edge, so instead of an ACK sometimes a NACK is read and the slave (i.e. the EDID ROM) ends the transfer. The bitbanging releases the data line for the ACK only 1/4 bit time after the falling clock edge, so a slave will see the correct value no matter if it samples at the rising or the falling clock edge or in the center. Fallback to bitbanging is already done for the CRT connector. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=92685 Signed-off-by: Stefan Brüns --- Changes in v2: - Fix/enhance commit message, no code changes drivers/gpu/drm/i915/intel_hdmi.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 4dea833f9d1b..847cda4c017c 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1573,12 +1573,20 @@ intel_hdmi_set_edid(struct drm_connector *connector) struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); struct edid *edid; bool connected = false; + struct i2c_adapter *i2c; intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS); - edid = drm_get_edid(connector, - intel_gmbus_get_adapter(dev_priv, - intel_hdmi->ddc_bus)); + i2c = intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus); + + edid = drm_get_edid(connector, i2c); + + if (!edid && !intel_gmbus_is_forced_bit(i2c)) { + DRM_DEBUG_KMS("HDMI GMBUS EDID read failed, retry using GPIO bit-banging\n"); + intel_gmbus_force_bit(i2c, true); + edid = drm_get_edid(connector, i2c); + intel_gmbus_force_bit(i2c, false); + } intel_hdmi_dp_dual_mode_detect(connector, edid != NULL); -- 2.15.1