Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753733AbeAATj3 (ORCPT + 1 other); Mon, 1 Jan 2018 14:39:29 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:34295 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753011AbeAATfE (ORCPT ); Mon, 1 Jan 2018 14:35:04 -0500 X-Google-Smtp-Source: ACJfBos8i+i77H+gzqgGUwoKasmPVJqeRq73o2Iyt7LqlFa31kMWoL68g6ny8sdo8+jpwtH+L3y2tg== From: Bryan O'Donoghue To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Bryan O'Donoghue , Tony Prisk Subject: [PATCH v2 16/34] clk: vt8500: change vtwm_pll_round_rate() return logic Date: Mon, 1 Jan 2018 19:34:42 +0000 Message-Id: <1514835300-381-2-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514835300-381-1-git-send-email-pure.logic@nexus-software.ie> References: <1514835300-381-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: This patch updates the round_rate() logic here to return zero instead of a negative number on error. In conjunction with higher-level changes associated with acting on the return value of clk_ops->round_rate() it is then possible to have clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of the current limitation of 1 Hz to LONG_MAX Hz. Signed-off-by: Bryan O'Donoghue Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Tony Prisk --- drivers/clk/clk-vt8500.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index 43c88f6..750c087 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -610,7 +610,7 @@ static unsigned long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate, struct clk_pll *pll = to_clk_pll(hw); u32 filter, mul, div1, div2; long round_rate; - int ret; + int ret = 1; switch (pll->type) { case PLL_TYPE_VT8500: @@ -634,11 +634,11 @@ static unsigned long vtwm_pll_round_rate(struct clk_hw *hw, unsigned long rate, round_rate = WM8850_BITS_TO_FREQ(*prate, mul, div1, div2); break; default: - ret = -EINVAL; + break; } if (ret) - return ret; + return 0; return round_rate; } -- 2.7.4