Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932250AbeAATnu (ORCPT + 1 other); Mon, 1 Jan 2018 14:43:50 -0500 Received: from mail-wm0-f67.google.com ([74.125.82.67]:43989 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932195AbeAATnm (ORCPT ); Mon, 1 Jan 2018 14:43:42 -0500 X-Google-Smtp-Source: ACJfBovrWW1y9yJrB4qkJmXYXNlPN3Z0wlJl2c974lVroPrMYp0vI5bE8mWHghbJGsnKvQCGrw9gJA== From: Bryan O'Donoghue To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Bryan O'Donoghue , Peter De Schrijver , Prashant Gaikwad , Thierry Reding , Jonathan Hunter , linux-tegra@vger.kernel.org, Rhyland Klein , Bill Huang Subject: [PATCH v3 26/34] clk: tegra: pll: change clk_pll_round_rate() return logic Date: Mon, 1 Jan 2018 19:43:05 +0000 Message-Id: <1514835793-1104-27-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514835793-1104-1-git-send-email-pure.logic@nexus-software.ie> References: <1514835793-1104-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: This patch updates the round_rate() logic here to return zero instead of a negative number on error. In conjunction with higher-level changes associated with acting on the return value of clk_ops->round_rate() it is then possible to have clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of the current limitation of 1 Hz to LONG_MAX Hz. Signed-off-by: Bryan O'Donoghue Cc: Peter De Schrijver Cc: Prashant Gaikwad Cc: Michael Turquette Cc: Stephen Boyd Cc: Thierry Reding Cc: Jonathan Hunter Cc: linux-clk@vger.kernel.org Cc: linux-tegra@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Rhyland Klein Cc: Bill Huang --- drivers/clk/tegra/clk-pll.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index b4a7d30..0a3edb0 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -839,7 +839,7 @@ static unsigned long clk_pll_round_rate(struct clk_hw *hw, unsigned long rate, if (_get_table_rate(hw, &cfg, rate, *prate) && pll->params->calc_rate(hw, &cfg, rate, *prate)) - return -EINVAL; + return 0; return cfg.output_rate; } -- 2.7.4