Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932270AbeAATpT (ORCPT + 1 other); Mon, 1 Jan 2018 14:45:19 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:39339 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932214AbeAATnr (ORCPT ); Mon, 1 Jan 2018 14:43:47 -0500 X-Google-Smtp-Source: ACJfBos0m2rurEYklVjcKLdFH4pu0lWvFlJ8ha7HHpWWyFuVuNMDRsBq3X3ndTmTCFtcwZoPqTKeLw== From: Bryan O'Donoghue To: mturquette@baylibre.com, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Bryan O'Donoghue , Boris Brezillon , Quentin Schulz Subject: [PATCH v3 31/34] clk: at91: change round_rate() return logic Date: Mon, 1 Jan 2018 19:43:10 +0000 Message-Id: <1514835793-1104-32-git-send-email-pure.logic@nexus-software.ie> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1514835793-1104-1-git-send-email-pure.logic@nexus-software.ie> References: <1514835793-1104-1-git-send-email-pure.logic@nexus-software.ie> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: This patch updates the round_rate() logic here to return zero instead of a negative number on error. In conjunction with higher-level changes associated with acting on the return value of clk_ops->round_rate() it is then possible to have clk_ops->round_rate() return values from 1 Hz to ULONG_MAX Hz instead of the current limitation of 1 Hz to LONG_MAX Hz. Signed-off-by: Bryan O'Donoghue Cc: Boris Brezillon Cc: Michael Turquette Cc: Stephen Boyd Cc: Quentin Schulz Cc: linux-clk@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/clk/at91/clk-audio-pll.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c index 56227cb..48231e3 100644 --- a/drivers/clk/at91/clk-audio-pll.c +++ b/drivers/clk/at91/clk-audio-pll.c @@ -278,7 +278,7 @@ static unsigned long clk_audio_pll_pad_round_rate(struct clk_hw *hw, unsigned long *parent_rate) { struct clk_hw *pclk = clk_hw_get_parent(hw); - long best_rate = -EINVAL; + unsigned long best_rate = 0; unsigned long best_parent_rate; unsigned long tmp_qd; u32 div; @@ -330,7 +330,7 @@ static unsigned long clk_audio_pll_pmc_round_rate(struct clk_hw *hw, unsigned long *parent_rate) { struct clk_hw *pclk = clk_hw_get_parent(hw); - long best_rate = -EINVAL; + unsigned long best_rate = 0; unsigned long best_parent_rate = 0; u32 tmp_qd = 0, div; long tmp_rate; -- 2.7.4