Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751354AbeABQmf (ORCPT + 1 other); Tue, 2 Jan 2018 11:42:35 -0500 Received: from mail.kmu-office.ch ([178.209.48.109]:53418 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751168AbeABQm3 (ORCPT ); Tue, 2 Jan 2018 11:42:29 -0500 From: Stefan Agner To: shawnguo@kernel.org, kernel@pengutronix.de Cc: fabio.estevam@nxp.com, robh+dt@kernel.org, mark.rutland@arm.com, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH 6/7] ARM: dts: imx6ull: add IOMUXC SNVS instance Date: Tue, 2 Jan 2018 17:42:22 +0100 Message-Id: <20180102164223.15230-6-stefan@agner.ch> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180102164223.15230-1-stefan@agner.ch> References: <20180102164223.15230-1-stefan@agner.ch> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: The i.MX 6ULL features another IOMUX Controller called IOMUXC SNVS which allows to control BOOT_MODE and TAMPER pins. Add the controller to the i.MX 6ULL specific imx6ull.dtsi device tree. Signed-off-by: Stefan Agner --- arch/arm/boot/dts/imx6ull.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi index a58c01dc15c3..bc2cd4fb8b12 100644 --- a/arch/arm/boot/dts/imx6ull.dtsi +++ b/arch/arm/boot/dts/imx6ull.dtsi @@ -42,3 +42,20 @@ #include "imx6ul.dtsi" #include "imx6ull-pinfunc.h" #include "imx6ull-pinfunc-snvs.h" + +/ { + soc { + aips3: aips-bus@2200000 { + compatible = "fsl,aips-bus", "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x02200000 0x100000>; + ranges; + + iomuxc_snvs: iomuxc-snvs@2290000 { + compatible = "fsl,imx6ull-iomuxc-snvs"; + reg = <0x02290000 0x4000>; + }; + }; + }; +}; -- 2.15.1