Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751048AbeABWyy (ORCPT + 1 other); Tue, 2 Jan 2018 17:54:54 -0500 Received: from mail-oi0-f65.google.com ([209.85.218.65]:42501 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750978AbeABWyv (ORCPT ); Tue, 2 Jan 2018 17:54:51 -0500 X-Google-Smtp-Source: ACJfBotJU4CVy+PvCagWfyP46uNj6ZG6QqTr6AoOdOAdHz+NitHuiMe+OCQCC8vESD2jafh4Ko8NU0YcWiGwQ1hgzEg= MIME-Version: 1.0 In-Reply-To: <1514709094-4110-1-git-send-email-ilya@compulab.co.il> References: <1514709094-4110-1-git-send-email-ilya@compulab.co.il> From: Fabio Estevam Date: Tue, 2 Jan 2018 20:54:50 -0200 Message-ID: Subject: Re: [PATCH v2] PCI: imx6: Add PHY reference clock source support To: Ilya Ledvich Cc: Richard Zhu , Lucas Stach , Bjorn Helgaas , linux-pci@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , linux-kernel , Rob Herring , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Hi Ilya, + Rob and dt list On Sun, Dec 31, 2017 at 6:31 AM, Ilya Ledvich wrote: > i.MX7D variant of the IP can use either Crystal Oscillator input > or internal clock input as a Reference Clock input for PCIe PHY. > Add support for an optional property 'pcie-phy-refclk-internal'. > If present then an internal clock input is used as PCIe PHY > reference clock source. By default an external oscillator input > is still used. > > Verified on Compulab SBC-iMX7 Single Board Computer. > > Signed-off-by: Ilya Ledvich > --- > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 5 +++++ > drivers/pci/dwc/pci-imx6.c | 8 +++++++- > 2 files changed, 12 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > index 7b1e48b..581bc09 100644 > --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt > @@ -50,6 +50,11 @@ Additional required properties for imx7d-pcie: > - "pciephy" > - "apps" > > +Additional optional properties for imx7d-pcie: > +- pcie-phy-refclk-internal: If present then an internal PLL input is used as > + PCIe PHY reference clock source. By default an external oscillator input > + is used. Should this contain the vendor prefix, like fsl,pcie-phy-refclk-internal ?