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From: Chen-Yu Tsai <wens@csie.org>
Date: Wed, 3 Jan 2018 13:46:14 +0800
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Subject: Re: [PATCH 02/11] clk: sunxi-ng: a83t: Add M divider to TCON1 clock
To: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>,
        David Airlie <airlied@linux.ie>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Chen-Yu Tsai <wens@csie.org>,
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On Sun, Dec 31, 2017 at 5:01 AM, Jernej Skrabec <jernej.skrabec@siol.net> wrote:
> TCON1 also has M divider, contrary to TCON0.
>
> Fixes: 05359be1176b ("clk: sunxi-ng: Add driver for A83T CCU")
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>

Added "And the mux is only 2 bits wide, instead of 3." to the commit
message and applied.

ChenYu