Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751666AbeACGdF (ORCPT + 1 other); Wed, 3 Jan 2018 01:33:05 -0500 Received: from mail-cys01nam02on0040.outbound.protection.outlook.com ([104.47.37.40]:20096 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751152AbeACGdC (ORCPT ); Wed, 3 Jan 2018 01:33:02 -0500 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=Ganapatrao.Kulkarni@cavium.com; From: Ganapatrao Kulkarni To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, tglx@linutronix.de, jason@lakedaemon.net, catalin.marinas@arm.com, will.deacon@arm.com, corbet@lwn.net, jnair@caviumnetworks.com, Robert.Richter@cavium.com, Jan.Glauber@cavium.com, Vadim.Lomovtsev@cavium.com, gklkml16@gmail.com Subject: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174 Date: Wed, 3 Jan 2018 12:02:24 +0530 Message-Id: <20180103063224.9965-1-ganapatrao.kulkarni@cavium.com> X-Mailer: git-send-email 2.9.4 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [111.93.218.67] X-ClientProxiedBy: BM1PR0101CA0017.INDPRD01.PROD.OUTLOOK.COM (10.174.220.27) To CY1PR07MB2570.namprd07.prod.outlook.com (10.167.16.25) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a07123d9-45f3-483b-9027-08d55273d65c X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(5600026)(4604075)(4534020)(4602075)(4627115)(201703031133081)(201702281549075)(2017052603307)(7153060);SRVR:CY1PR07MB2570; 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Adding workaround to issue INV after MOVI for cross-node collection move to flush out the cached entry. Signed-off-by: Ganapatrao Kulkarni --- Documentation/arm64/silicon-errata.txt | 1 + arch/arm64/Kconfig | 11 +++++++++++ drivers/irqchip/irq-gic-v3-its.c | 24 ++++++++++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index fc1c884..fb27cb5 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -63,6 +63,7 @@ stable kernels. | Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 | | Cavium | ThunderX Core | #30115 | CAVIUM_ERRATUM_30115 | | Cavium | ThunderX SMMUv2 | #27704 | N/A | +| Cavium | ThunderX2 ITS | #174 | CAVIUM_ERRATUM_174 | | Cavium | ThunderX2 SMMUv3| #74 | N/A | | Cavium | ThunderX2 SMMUv3| #126 | N/A | | | | | | diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index c9a7e9e..71a7e30 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -461,6 +461,17 @@ config ARM64_ERRATUM_843419 If unsure, say Y. +config CAVIUM_ERRATUM_174 + bool "Cavium ThunderX2 erratum 174" + depends on NUMA + default y + help + LPI stops routed to redistributors after inter node collection + move in ITS. Enable workaround to invalidate ITS entry after + inter-node collection move. + + If unsure, say Y. + config CAVIUM_ERRATUM_22375 bool "Cavium erratum 22375, 24313" default y diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 06f025f..d8b9c96 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -46,6 +46,7 @@ #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) +#define ITS_FLAGS_WORKAROUND_CAVIUM_174 (1ULL << 3) #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) @@ -1119,6 +1120,12 @@ static int its_set_affinity(struct irq_data *d, const struct cpumask *mask_val, if (cpu != its_dev->event_map.col_map[id]) { target_col = &its_dev->its->collections[cpu]; its_send_movi(its_dev, target_col, id); + if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_174) { + /* Issue INV for cross node collection move. */ + if (cpu_to_node(cpu) != + cpu_to_node(its_dev->event_map.col_map[id])) + its_send_inv(its_dev, id); + } its_dev->event_map.col_map[id] = cpu; irq_data_update_effective_affinity(d, cpumask_of(cpu)); } @@ -2904,6 +2911,15 @@ static int its_force_quiescent(void __iomem *base) } } +static bool __maybe_unused its_enable_quirk_cavium_174(void *data) +{ + struct its_node *its = data; + + its->flags |= ITS_FLAGS_WORKAROUND_CAVIUM_174; + + return true; +} + static bool __maybe_unused its_enable_quirk_cavium_22375(void *data) { struct its_node *its = data; @@ -3031,6 +3047,14 @@ static const struct gic_quirk its_quirks[] = { .init = its_enable_quirk_hip07_161600802, }, #endif +#ifdef CONFIG_CAVIUM_ERRATUM_174 + { + .desc = "ITS: Cavium ThunderX2 erratum 174", + .iidr = 0x13f, /* ThunderX2 pass A1/A2/B0 */ + .mask = 0xffffffff, + .init = its_enable_quirk_cavium_174, + }, +#endif { } }; -- 2.9.4