Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752082AbeACJcG (ORCPT + 1 other); Wed, 3 Jan 2018 04:32:06 -0500 Received: from mail-cys01nam02on0056.outbound.protection.outlook.com ([104.47.37.56]:32736 "EHLO NAM02-CY1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751933AbeACJcA (ORCPT ); Wed, 3 Jan 2018 04:32:00 -0500 Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=nxp.com; kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=fail action=none header.from=nxp.com; From: Anson Huang To: , , CC: , , , , Subject: [PATCH] clk: imx: imx7d: correct video pll clock tree Date: Thu, 4 Jan 2018 01:09:21 +0800 Message-ID: <1514999361-2723-1-git-send-email-Anson.Huang@nxp.com> X-Mailer: git-send-email 1.9.1 X-EOPAttributedMessage: 0 X-Matching-Connectors: 131594454932701321;(91ab9b29-cfa4-454e-5278-08d120cd25b8);() X-Forefront-Antispam-Report: CIP:192.88.168.50;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(336005)(396003)(39380400002)(39860400002)(346002)(376002)(2980300002)(1109001)(1110001)(339900001)(189003)(199004)(50466002)(8936002)(47776003)(97736004)(68736007)(104016004)(16586007)(50226002)(54906003)(110136005)(316002)(48376002)(36756003)(498600001)(72206003)(59450400001)(8656006)(105606002)(106466001)(85426001)(51416003)(2201001)(2906002)(4326008)(356003)(77096006)(5660300001)(8676002)(6666003)(53936002)(86362001)(305945005)(81156014)(81166006)(2101003);DIR:OUT;SFP:1101;SCL:1;SRVR:CY1PR03MB2364;H:tx30smr01.am.freescale.net;FPR:;SPF:Fail;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; X-Microsoft-Exchange-Diagnostics: 1;BN1BFFO11FD010;1:X1iJgs3XlntJg+MrIMdTM93jIs8YywnYUgx0/ksXx1vTR4jMk9l67psMDTpDzhWUM8zo+Is7/RHi2K5p33apAVDjJC/pgKMqZcph4V7lj3zqX9XjlNwVBgAnfDwnk56z MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 449225ae-28c7-497c-c089-08d5528cc723 X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:(4534020)(4628075)(201703131517081)(5600026)(4604075)(2017052603307);SRVR:CY1PR03MB2364; X-Microsoft-Exchange-Diagnostics: 1;CY1PR03MB2364;3:53S6ud39UbNG9X/DzH1HgHv6hw39iVW6EKXqrqy67oj7UFyYmN51qc887O3LlmvsT8W8ZL5PirqM+ukuIq1kGnxVWfCFakv68GD204MxBWDEqf4wHtnyEeFPlZSYyDeO20hmt/KG42oBaIz7IuGGGm63TqLH7Bf0eiulFpn5iqvPyTHJDk1YZNifKr0OkIjSBgiEOiPLhxgv3mDj9PYbBBJ1iPGBoGMp/TDLZw+Q70FUY17GHc4YuB4aHqezFpCBAItMKlQeOtn1oKTRIiABxJSRaBXkLbvFBt8lj9klnjCVj+nt+UUlM9T0KardqIiRaZxQTXdMFOsCuNsBKP5YRP1wmroyEVVOyu12AAZtYWo=;25:bAvO2dQM+FukeG9OtHLYyPfs66EZxTgTtKaEHUn5dzOLQGwupbr3uB9BhmkLw6Uh/jxqTc5lbY+hXVNnyZZZ479QnH3L3wxLL0s/L1Cj7mBEsarCnshazUk+e0gHMgbqxVOL3+5EIPzfPyq+uhVWTwYF+ggcqL6YB3ayh21yRH3UewXanN92pi9Xs++6WVObiiFkCBIm742CvVigxkyWypqMYJ6jFaVtxMvJGo1l5Vngyp/mFAAYGb4+2oi3mn2/aS9o7BDEJVpr1HgolfMmiYXyVb05CSLoEkMB6ygb7uhjmpoN/ONwgNpQ7fiZovxXYeNieh9rezrh98fWE/GyZg== X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY1PR03MB2364: X-Microsoft-Exchange-Diagnostics: 1;CY1PR03MB2364;31:rZBb02mcWiPHMg4Q8NY9zL3g3h07DOisMpbThF6FZeA3Jk2oBDVzGS1F9AtDAJXXxEomlpvbWu0V0+g+Vr/23NZx3RfY/g6VaXGvrv0m//3usu8g5uf0dA84KlKQK8Rtidku3Ox3A99erh3m6eBVrl6W7bSFKx++fUUFAkKYasv3hi+LbyjndR0fo69Y0sNE8zVSOA4wuG5IfBj2NkffyzAf7zh+tQ5KbRGN3Tm+vPk=;4:y7bJPsENs3YJtVrNHLC3kp2ZfpwnnR2KbTxWEzMywS8bE7RI3KPRswCpczqpT91vfuxvVmVjRvAlHBsCA+yKlKTBsCPBtAnP0CNnGih2kZHmAAiAhpDrzLf0fhWE5C0vNNOnsS6xDPY4ihOvtJTiUdRRBzKYQTC1adj7rJVl1SkYFo/NqXH1aXaFE5Jea4sogwgSwGvOjYx63YM6202vPtzPqD6kz8zEp0p7rBpZZnbcZ90ux9bvE6jtu/Yjz+atMZcQB5/deHnxNDL7R1CUuGuJp0ZmPNzLyCwIjt3oN+IZhRwUNwhOkh1R2o5ZAdWd X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(185117386973197); X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(6095135)(2401047)(8121501046)(5005006)(10201501046)(93006095)(93001095)(3231023)(944510075)(944921075)(946801075)(946901075)(3002001)(6055026)(6096035)(20161123563025)(20161123556025)(20161123561025)(20161123565025)(201703131430075)(201703131433075)(201703131448075)(201703161259150)(201703151042153)(20161123559100)(201708071742011);SRVR:CY1PR03MB2364;BCL:0;PCL:0;RULEID:(100000803101)(100110400095)(400006);SRVR:CY1PR03MB2364; X-Forefront-PRVS: 0541031FF6 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1;CY1PR03MB2364;23:hzms+MB0Tvej64oBi64enNnguxFqRBTwY1pO9EN7H?= =?us-ascii?Q?1ohdHe4UmcAP0/ubyY4UAhJAfuINWkeH91G0cXxwKq1CHU3zQkIXEuRC8HwZ?= =?us-ascii?Q?2ofnNsDXJx7c2GrjxM0Q+StuAh21nXKWsF6is4BWGngSDVEdIIvbir9k/+/B?= =?us-ascii?Q?wD6kp1uctdb98Tk2P37fJayghQ1CM3F7VK3quOBHlZ3eobLgI+5NfhhLro8K?= =?us-ascii?Q?Z6BLIZTvJCf5N0BwLn2d5AcIWb0BxlduqV9LjlfGrcmO+4b+R3A/9At4oyI0?= =?us-ascii?Q?yGcAmWEDwYcr3JSSjjZq+8xEZDfSTudkUHrXQ9M0p2KHg1MaS7s8+U9y8fDD?= =?us-ascii?Q?wDCxR+A5sxguznjoOSzrAVaAVtIPgBMKa6pe3xaOnl8tznoDMOCDL4X+nmV9?= =?us-ascii?Q?rfPYucZQpMYoZvQ/+FTcGZrhpQYrAb4FjNCCmOydAGGnt607kOE4I8ROBdAW?= =?us-ascii?Q?+pdNF/rQJhS0BhHEPVYwpMu92Xbow4pJToWvVSWUP2UsIv5Lrz0kHMPLrjRo?= =?us-ascii?Q?RXPcbv1fAYk6YBM0L4/6b/JCRiD4Krj3ddjpyqx61o/VE5VERo3IhdkIw8wF?= =?us-ascii?Q?RupIEj9rO42aO2VeeuWNUY/LTAtAkSboflVd4042juqrrKUoxY0spPVva2Ry?= =?us-ascii?Q?kJN22B1sbLrW4q5clQp7gccGq+OWiIaK4VNhJq/6bQCnfBZrfCk1h6tqKld+?= =?us-ascii?Q?oAiQ/h9V2x5oyZW3FnhEgyE/Sr5U5kRwWIKSCvpLYa3IJFj+vQSfM7JbUUIK?= =?us-ascii?Q?HC/xxn3/VQ4Ldw0JrRPn70nxzdHtWiuBym1Fn4hq3DMG0CwE4EU8OjNoMqQI?= =?us-ascii?Q?a9UqjHKUrX8bjt3P6tKr1ALclpp2pqY7ThgHVEQ9HrEAzHbk58WA+LDdd6Z9?= =?us-ascii?Q?+9jI/vc0194EqE5Dm1dXtOyfC8b8xZkEbaokbR/m2H5wMYFbr2q34eE6tY0e?= =?us-ascii?Q?QfSApRitsOhqwinP8FrTW5iqUyjS+oydYnU/OAdC2qpK3Uful2W3aEYhmzAY?= =?us-ascii?Q?8Kb5Ksx3uRneEGwdGUPAHY8uFtoOvv+L09NPA6TDIsfYNFktm0iW7Bva+cD1?= =?us-ascii?Q?sR4MD/k+dOiD3bE2OCy7UkD9nTl6xElxJWjxwShzcdWtg5e6w=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1;CY1PR03MB2364;6:Z0wYydkwyUX/YjhbT7FP6cUHMpDQZ01UOHpCliWlgNhvFGQIkziirpJWoM5K5i78mY9hMIlVi/LFJNeAYw9uLxt8Y8g5c6MB66CTppzdR1A1sB4jDfcZHwoE/NVt5BFshhWXT/EJ1c+WdCKzLTypnsHCAbuKhAOgfxznrbDHGpYJYe8bmZCKg0NEv1FXDntsbyXxX55hqf3sGUD9E6RJLwIwdGQK8HbbDW6ppPyXSxYvGzX5RyAvcZ3FDXs54YdycbyHmLXp6IifWeUsQuJ2BWRFPeQHO2+zsvRgOWFDyyhl0exDW3ps0SZg6R/gcvCNjTuTTpXls1N4u8U/zVciZvd+fsbtOprTHAQNiPDU+LU=;5:vdOVBoLQ5iW6IznEbhDq0kVliCbtiOn4pVRQ3rqYIcUEqTkuE6cxF3rcYwR/NAOOgDdpvpZdj7510VUxBlIefOOX9KjdvlZQMS90vFCXqHzLxWhM5rggIF4UwsenhxaafywRwSErepneuXAnMGJpDEtjdRkTt88t3xE1knGnzN0=;24:+gZE8d/uBdc8C3SALvvT+WuH0sQinHbqWTfPC3+bl0yCCgZJO8XOiqbAv1JWNJR94qMWHn7syh5BdL7yXmjVaOFQX/nUTMFNV28aZNaiE4M=;7:8angmUCYVcPG3T0n0BgNwBz9BNDzwOk5Lqzwm9nORz2EQgnQ7lO9oLegWOTnezGGJjvCUJROFmT1IkV97tLYp8swRVNf9mYoG6d9B8yMWJ1UewAZEa2IxQ4smTtqVFdNXBUJ2Nar7XxLMcEvcmysH14qKrdynXAg8AQWCItfLt7hkTmwu+PUfTEpYf0ZlqHjMXSJv2ebSMwJJyHwAvTyrOSrUa/aVfEQY5VatfB+t5TqHSGxLdHIvJ0yKp4R44Sc SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jan 2018 09:31:33.0361 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 449225ae-28c7-497c-c089-08d5528cc723 X-MS-Exchange-CrossTenant-Id: 5afe0b00-7697-4969-b663-5eab37d5f47e X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;Ip=[192.88.168.50];Helo=[tx30smr01.am.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR03MB2364 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: There is a test divider and post divider in video PLL, test divider is placed before post divider, all clocks that can select parent from video PLL should be from post divider, NOT from pll_video_main, below are clock tree dump before and after this patch: Before: pll_video_main pll_video_main_bypass pll_video_main_clk lcdif_pixel_src lcdif_pixel_cg lcdif_pixel_pre_div lcdif_pixel_post_div lcdif_pixel_root_clk After: pll_video_main pll_video_main_bypass pll_video_main_clk pll_video_test_div pll_video_post_div lcdif_pixel_src lcdif_pixel_cg lcdif_pixel_pre_div lcdif_pixel_post_div lcdif_pixel_root_clk Signed-off-by: Anson Huang --- drivers/clk/imx/clk-imx7d.c | 84 ++++++++++++++++++++++++--------------------- 1 file changed, 44 insertions(+), 40 deletions(-) diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c index 80dc211..992938b 100644 --- a/drivers/clk/imx/clk-imx7d.c +++ b/drivers/clk/imx/clk-imx7d.c @@ -51,20 +51,20 @@ static const char *arm_m4_sel[] = { "osc", "pll_sys_main_240m_clk", "pll_enet_250m_clk", "pll_sys_pfd2_270m_clk", - "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", }; static const char *axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk", "pll_dram_533m_clk", "pll_enet_250m_clk", "pll_sys_pfd5_clk", - "pll_audio_post_div", "pll_video_main_clk", "pll_sys_pfd7_clk", }; + "pll_audio_post_div", "pll_video_post_div", "pll_sys_pfd7_clk", }; static const char *disp_axi_sel[] = { "osc", "pll_sys_pfd1_332m_clk", "pll_dram_533m_clk", "pll_enet_250m_clk", "pll_sys_pfd6_clk", - "pll_sys_pfd7_clk", "pll_audio_post_div", "pll_video_main_clk", }; + "pll_sys_pfd7_clk", "pll_audio_post_div", "pll_video_post_div", }; static const char *enet_axi_sel[] = { "osc", "pll_sys_pfd2_270m_clk", "pll_dram_533m_clk", "pll_enet_250m_clk", - "pll_sys_main_240m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_sys_main_240m_clk", "pll_audio_post_div", "pll_video_post_div", "pll_sys_pfd4_clk", }; static const char *nand_usdhc_bus_sel[] = { "osc", "pll_sys_pfd2_270m_clk", @@ -75,7 +75,7 @@ static const char *ahb_channel_sel[] = { "osc", "pll_sys_pfd2_270m_clk", "pll_dram_533m_clk", "pll_sys_pfd0_392m_clk", "pll_enet_125m_clk", "pll_usb_main_clk", "pll_audio_post_div", - "pll_video_main_clk", }; + "pll_video_post_div", }; static const char *dram_phym_sel[] = { "pll_dram_main_clk", "dram_phym_alt_clk", }; @@ -86,7 +86,7 @@ static const char *dram_phym_alt_sel[] = { "osc", "pll_dram_533m_clk", "pll_sys_main_clk", "pll_enet_500m_clk", "pll_usb_main_clk", "pll_sys_pfd7_clk", "pll_audio_post_div", - "pll_video_main_clk", }; + "pll_video_post_div", }; static const char *dram_alt_sel[] = { "osc", "pll_dram_533m_clk", "pll_sys_main_clk", "pll_enet_500m_clk", @@ -108,62 +108,62 @@ static const char *epdc_pixel_sel[] = { "osc", "pll_sys_pfd1_332m_clk", "pll_dram_533m_clk", "pll_sys_main_clk", "pll_sys_pfd5_clk", - "pll_sys_pfd6_clk", "pll_sys_pfd7_clk", "pll_video_main_clk", }; + "pll_sys_pfd6_clk", "pll_sys_pfd7_clk", "pll_video_post_div", }; static const char *lcdif_pixel_sel[] = { "osc", "pll_sys_pfd5_clk", "pll_dram_533m_clk", "ext_clk_3", "pll_sys_pfd4_clk", - "pll_sys_pfd2_270m_clk", "pll_video_main_clk", + "pll_sys_pfd2_270m_clk", "pll_video_post_div", "pll_usb_main_clk", }; static const char *mipi_dsi_sel[] = { "osc", "pll_sys_pfd5_clk", "pll_sys_pfd3_clk", "pll_sys_main_clk", "pll_sys_pfd0_196m_clk", - "pll_dram_533m_clk", "pll_video_main_clk", "pll_audio_post_div", }; + "pll_dram_533m_clk", "pll_video_post_div", "pll_audio_post_div", }; static const char *mipi_csi_sel[] = { "osc", "pll_sys_pfd4_clk", "pll_sys_pfd3_clk", "pll_sys_main_clk", "pll_sys_pfd0_196m_clk", - "pll_dram_533m_clk", "pll_video_main_clk", "pll_audio_post_div", }; + "pll_dram_533m_clk", "pll_video_post_div", "pll_audio_post_div", }; static const char *mipi_dphy_sel[] = { "osc", "pll_sys_main_120m_clk", "pll_dram_533m_clk", "pll_sys_pfd5_clk", "ref_1m_clk", "ext_clk_2", - "pll_video_main_clk", "ext_clk_3", }; + "pll_video_post_div", "ext_clk_3", }; static const char *sai1_sel[] = { "osc", "pll_sys_pfd2_135m_clk", - "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_main_clk", + "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_post_div", "pll_sys_pfd4_clk", "pll_enet_125m_clk", "ext_clk_2", }; static const char *sai2_sel[] = { "osc", "pll_sys_pfd2_135m_clk", - "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_main_clk", + "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_post_div", "pll_sys_pfd4_clk", "pll_enet_125m_clk", "ext_clk_2", }; static const char *sai3_sel[] = { "osc", "pll_sys_pfd2_135m_clk", - "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_main_clk", + "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_post_div", "pll_sys_pfd4_clk", "pll_enet_125m_clk", "ext_clk_3", }; static const char *spdif_sel[] = { "osc", "pll_sys_pfd2_135m_clk", - "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_main_clk", + "pll_audio_post_div", "pll_dram_533m_clk", "pll_video_post_div", "pll_sys_pfd4_clk", "pll_enet_125m_clk", "ext_3_clk", }; static const char *enet1_ref_sel[] = { "osc", "pll_enet_125m_clk", "pll_enet_50m_clk", "pll_enet_25m_clk", - "pll_sys_main_120m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_sys_main_120m_clk", "pll_audio_post_div", "pll_video_post_div", "ext_clk_4", }; static const char *enet1_time_sel[] = { "osc", "pll_enet_100m_clk", "pll_audio_post_div", "ext_clk_1", "ext_clk_2", "ext_clk_3", - "ext_clk_4", "pll_video_main_clk", }; + "ext_clk_4", "pll_video_post_div", }; static const char *enet2_ref_sel[] = { "osc", "pll_enet_125m_clk", "pll_enet_50m_clk", "pll_enet_25m_clk", - "pll_sys_main_120m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_sys_main_120m_clk", "pll_audio_post_div", "pll_video_post_div", "ext_clk_4", }; static const char *enet2_time_sel[] = { "osc", "pll_enet_100m_clk", "pll_audio_post_div", "ext_clk_1", "ext_clk_2", "ext_clk_3", - "ext_clk_4", "pll_video_main_clk", }; + "ext_clk_4", "pll_video_post_div", }; static const char *enet_phy_ref_sel[] = { "osc", "pll_enet_25m_clk", "pll_enet_50m_clk", "pll_enet_125m_clk", - "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_dram_533m_clk", "pll_audio_post_div", "pll_video_post_div", "pll_sys_pfd3_clk", }; static const char *eim_sel[] = { "osc", "pll_sys_pfd2_135m_clk", @@ -174,7 +174,7 @@ static const char *nand_sel[] = { "osc", "pll_sys_main_clk", "pll_dram_533m_clk", "pll_sys_pfd0_392m_clk", "pll_sys_pfd3_clk", "pll_enet_500m_clk", "pll_enet_250m_clk", - "pll_video_main_clk", }; + "pll_video_post_div", }; static const char *qspi_sel[] = { "osc", "pll_sys_pfd4_clk", "pll_dram_533m_clk", "pll_enet_500m_clk", "pll_sys_pfd3_clk", @@ -204,22 +204,22 @@ static const char *i2c1_sel[] = { "osc", "pll_sys_main_120m_clk", "pll_enet_50m_clk", "pll_dram_533m_clk", - "pll_audio_post_div", "pll_video_main_clk", "pll_usb_main_clk", + "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", "pll_sys_pfd2_135m_clk", }; static const char *i2c2_sel[] = { "osc", "pll_sys_main_120m_clk", "pll_enet_50m_clk", "pll_dram_533m_clk", - "pll_audio_post_div", "pll_video_main_clk", "pll_usb_main_clk", + "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", "pll_sys_pfd2_135m_clk", }; static const char *i2c3_sel[] = { "osc", "pll_sys_main_120m_clk", "pll_enet_50m_clk", "pll_dram_533m_clk", - "pll_audio_post_div", "pll_video_main_clk", "pll_usb_main_clk", + "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", "pll_sys_pfd2_135m_clk", }; static const char *i2c4_sel[] = { "osc", "pll_sys_main_120m_clk", "pll_enet_50m_clk", "pll_dram_533m_clk", - "pll_audio_post_div", "pll_video_main_clk", "pll_usb_main_clk", + "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", "pll_sys_pfd2_135m_clk", }; static const char *uart1_sel[] = { "osc", "pll_sys_main_240m_clk", @@ -279,27 +279,27 @@ static const char *pwm1_sel[] = { "osc", "pll_enet_100m_clk", "pll_sys_main_120m_clk", "pll_enet_40m_clk", "pll_audio_post_div", - "ext_clk_1", "ref_1m_clk", "pll_video_main_clk", }; + "ext_clk_1", "ref_1m_clk", "pll_video_post_div", }; static const char *pwm2_sel[] = { "osc", "pll_enet_100m_clk", "pll_sys_main_120m_clk", "pll_enet_40m_clk", "pll_audio_post_div", - "ext_clk_1", "ref_1m_clk", "pll_video_main_clk", }; + "ext_clk_1", "ref_1m_clk", "pll_video_post_div", }; static const char *pwm3_sel[] = { "osc", "pll_enet_100m_clk", "pll_sys_main_120m_clk", "pll_enet_40m_clk", "pll_audio_post_div", - "ext_clk_2", "ref_1m_clk", "pll_video_main_clk", }; + "ext_clk_2", "ref_1m_clk", "pll_video_post_div", }; static const char *pwm4_sel[] = { "osc", "pll_enet_100m_clk", "pll_sys_main_120m_clk", "pll_enet_40m_clk", "pll_audio_post_div", - "ext_clk_2", "ref_1m_clk", "pll_video_main_clk", }; + "ext_clk_2", "ref_1m_clk", "pll_video_post_div", }; static const char *flextimer1_sel[] = { "osc", "pll_enet_100m_clk", "pll_sys_main_120m_clk", "pll_enet_40m_clk", "pll_audio_post_div", - "ext_clk_3", "ref_1m_clk", "pll_video_main_clk", }; + "ext_clk_3", "ref_1m_clk", "pll_video_post_div", }; static const char *flextimer2_sel[] = { "osc", "pll_enet_100m_clk", "pll_sys_main_120m_clk", "pll_enet_40m_clk", "pll_audio_post_div", - "ext_clk_3", "ref_1m_clk", "pll_video_main_clk", }; + "ext_clk_3", "ref_1m_clk", "pll_video_post_div", }; static const char *sim1_sel[] = { "osc", "pll_sys_pfd2_135m_clk", "pll_sys_main_120m_clk", "pll_dram_533m_clk", @@ -308,23 +308,23 @@ static const char *sim2_sel[] = { "osc", "pll_sys_pfd2_135m_clk", "pll_sys_main_120m_clk", "pll_dram_533m_clk", - "pll_usb_main_clk", "pll_video_main_clk", "pll_enet_125m_clk", + "pll_usb_main_clk", "pll_video_post_div", "pll_enet_125m_clk", "pll_sys_pfd7_clk", }; static const char *gpt1_sel[] = { "osc", "pll_enet_100m_clk", - "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_main_clk", + "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_post_div", "ref_1m_clk", "pll_audio_post_div", "ext_clk_1", }; static const char *gpt2_sel[] = { "osc", "pll_enet_100m_clk", - "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_main_clk", + "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_post_div", "ref_1m_clk", "pll_audio_post_div", "ext_clk_2", }; static const char *gpt3_sel[] = { "osc", "pll_enet_100m_clk", - "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_main_clk", + "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_post_div", "ref_1m_clk", "pll_audio_post_div", "ext_clk_3", }; static const char *gpt4_sel[] = { "osc", "pll_enet_100m_clk", - "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_main_clk", + "pll_sys_pfd0_392m_clk", "pll_enet_40m_clk", "pll_video_post_div", "ref_1m_clk", "pll_audio_post_div", "ext_clk_4", }; static const char *trace_sel[] = { "osc", "pll_sys_pfd2_135m_clk", @@ -339,12 +339,12 @@ static const char *csi_mclk_sel[] = { "osc", "pll_sys_pfd2_135m_clk", "pll_sys_main_120m_clk", "pll_dram_533m_clk", - "pll_enet_125m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_enet_125m_clk", "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", }; static const char *audio_mclk_sel[] = { "osc", "pll_sys_pfd2_135m_clk", "pll_sys_main_120m_clk", "pll_dram_533m_clk", - "pll_enet_125m_clk", "pll_audio_post_div", "pll_video_main_clk", + "pll_enet_125m_clk", "pll_audio_post_div", "pll_video_post_div", "pll_usb_main_clk", }; static const char *wrclk_sel[] = { "osc", "pll_enet_40m_clk", @@ -358,13 +358,13 @@ static const char *clko2_sel[] = { "osc", "pll_sys_main_240m_clk", "pll_sys_pfd0_392m_clk", "pll_sys_pfd1_166m_clk", "pll_sys_pfd4_clk", - "pll_audio_post_div", "pll_video_main_clk", "ckil", }; + "pll_audio_post_div", "pll_video_post_div", "ckil", }; static const char *lvds1_sel[] = { "pll_arm_main_clk", "pll_sys_main_clk", "pll_sys_pfd0_392m_clk", "pll_sys_pfd1_332m_clk", "pll_sys_pfd2_270m_clk", "pll_sys_pfd3_clk", "pll_sys_pfd4_clk", "pll_sys_pfd5_clk", "pll_sys_pfd6_clk", "pll_sys_pfd7_clk", - "pll_audio_post_div", "pll_video_main_clk", "pll_enet_500m_clk", + "pll_audio_post_div", "pll_video_post_div", "pll_enet_500m_clk", "pll_enet_250m_clk", "pll_enet_125m_clk", "pll_enet_100m_clk", "pll_enet_50m_clk", "pll_enet_40m_clk", "pll_enet_25m_clk", "pll_dram_main_clk", }; @@ -450,6 +450,10 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node) CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 19, 2, 0, test_div_table, &imx_ccm_lock); clks[IMX7D_PLL_AUDIO_POST_DIV] = clk_register_divider_table(NULL, "pll_audio_post_div", "pll_audio_test_div", CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0xf0, 22, 2, 0, post_div_table, &imx_ccm_lock); + clks[IMX7D_PLL_VIDEO_TEST_DIV] = clk_register_divider_table(NULL, "pll_video_test_div", "pll_video_main_clk", + CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 19, 2, 0, test_div_table, &imx_ccm_lock); + clks[IMX7D_PLL_VIDEO_POST_DIV] = clk_register_divider_table(NULL, "pll_video_post_div", "pll_video_test_div", + CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE, base + 0x130, 22, 2, 0, post_div_table, &imx_ccm_lock); clks[IMX7D_PLL_SYS_PFD0_392M_CLK] = imx_clk_pfd("pll_sys_pfd0_392m_clk", "pll_sys_main_clk", base + 0xc0, 0); clks[IMX7D_PLL_SYS_PFD1_332M_CLK] = imx_clk_pfd("pll_sys_pfd1_332m_clk", "pll_sys_main_clk", base + 0xc0, 1); -- 1.9.1