Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751191AbeACQYA (ORCPT + 1 other); Wed, 3 Jan 2018 11:24:00 -0500 Received: from terminus.zytor.com ([65.50.211.136]:56199 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750989AbeACQX6 (ORCPT ); Wed, 3 Jan 2018 11:23:58 -0500 Date: Wed, 3 Jan 2018 08:21:47 -0800 From: tip-bot for Tom Lendacky Message-ID: Cc: dave.hansen@linux.intel.com, bp@suse.de, luto@kernel.org, linux-kernel@vger.kernel.org, hpa@zytor.com, thomas.lendacky@amd.com, mingo@kernel.org, tglx@linutronix.de Reply-To: dave.hansen@linux.intel.com, luto@kernel.org, bp@suse.de, hpa@zytor.com, linux-kernel@vger.kernel.org, thomas.lendacky@amd.com, mingo@kernel.org, tglx@linutronix.de In-Reply-To: <20171227054354.20369.94587.stgit@tlendack-t1.amdoffice.net> References: <20171227054354.20369.94587.stgit@tlendack-t1.amdoffice.net> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/pti] x86/cpu, x86/pti: Do not enable PTI on AMD processors Git-Commit-ID: 694d99d40972f12e59a3696effee8a376b79d7c8 X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Commit-ID: 694d99d40972f12e59a3696effee8a376b79d7c8 Gitweb: https://git.kernel.org/tip/694d99d40972f12e59a3696effee8a376b79d7c8 Author: Tom Lendacky AuthorDate: Tue, 26 Dec 2017 23:43:54 -0600 Committer: Thomas Gleixner CommitDate: Wed, 3 Jan 2018 15:57:59 +0100 x86/cpu, x86/pti: Do not enable PTI on AMD processors AMD processors are not subject to the types of attacks that the kernel page table isolation feature protects against. The AMD microarchitecture does not allow memory references, including speculative references, that access higher privileged data when running in a lesser privileged mode when that access would result in a page fault. Disable page table isolation by default on AMD processors by not setting the X86_BUG_CPU_INSECURE feature, which controls whether X86_FEATURE_PTI is set. Signed-off-by: Tom Lendacky Signed-off-by: Thomas Gleixner Reviewed-by: Borislav Petkov Cc: Dave Hansen Cc: Andy Lutomirski Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20171227054354.20369.94587.stgit@tlendack-t1.amdoffice.net --- arch/x86/kernel/cpu/common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index f2a94df..b1be494 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -899,8 +899,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) setup_force_cpu_cap(X86_FEATURE_ALWAYS); - /* Assume for now that ALL x86 CPUs are insecure */ - setup_force_cpu_bug(X86_BUG_CPU_INSECURE); + if (c->x86_vendor != X86_VENDOR_AMD) + setup_force_cpu_bug(X86_BUG_CPU_INSECURE); fpu__init_system(c);