Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751040AbeACTWl (ORCPT + 1 other); Wed, 3 Jan 2018 14:22:41 -0500 Received: from mail-oi0-f44.google.com ([209.85.218.44]:46660 "EHLO mail-oi0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750864AbeACTWj (ORCPT ); Wed, 3 Jan 2018 14:22:39 -0500 X-Google-Smtp-Source: ACJfBounmKxFL59aAJf863LERz+m56d6zBsSBuLwl8VZPrSuRPLA9JiBCpuowXF9FfYdvEWxi22caBNXyPY0qhRhqC4= MIME-Version: 1.0 From: Albert Cahalan Date: Wed, 3 Jan 2018 14:22:37 -0500 Message-ID: Subject: page table isolation alternative mechanism To: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: We got into the current situation for performance reasons, avoiding the costly reload of CR3 that a hardware task switch would cause. It seems we'll be loading CR3 now anyway, so it might be time to reconsider hardware task switches. The recent patches leave kernel entry/exit code mapped. Hardware task switches wouldn't need that. All they need is a single entry in a reduced-size IDT, for the doublefault, and a minimal GDT, and a TSS. Taking the fault switches CR3. That then gets you a proper IDT and GDT because those are virtually mapped. Not a single byte of kernel code would need to be mapped while user code runs.