Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752615AbeADJlS (ORCPT + 1 other); Thu, 4 Jan 2018 04:41:18 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:47226 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1752535AbeADJlM (ORCPT ); Thu, 4 Jan 2018 04:41:12 -0500 X-UUID: da93772349e14dbea08538312be744ec-20180104 From: To: , , , , CC: , , Sean Wang Subject: [PATCH 03/12] arm64: dts: mt7622: add power domain controller device nodes Date: Thu, 4 Jan 2018 17:40:53 +0800 Message-ID: <594447389e18e97727ae5e304e30a79292a3559f.1515057696.git.sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: From: Sean Wang add power domain controller nodes Signed-off-by: Sean Wang Cc: Matthias Brugger --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index 9730f0e..6fdc449 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include #include / { @@ -109,6 +110,20 @@ #reset-cells = <1>; }; + scpsys: scpsys@10006000 { + compatible = "mediatek,mt7622-scpsys", + "syscon"; + #power-domain-cells = <1>; + reg = <0 0x10006000 0 0x1000>; + interrupts = , + , + , + ; + infracfg = <&infracfg>; + clocks = <&topckgen CLK_TOP_HIF_SEL>; + clock-names = "hif_sel"; + }; + sysirq: interrupt-controller@10200620 { compatible = "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq"; -- 2.7.4