Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752898AbeADNAD (ORCPT + 1 other); Thu, 4 Jan 2018 08:00:03 -0500 Received: from mail-oi0-f65.google.com ([209.85.218.65]:33364 "EHLO mail-oi0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752408AbeADM77 (ORCPT ); Thu, 4 Jan 2018 07:59:59 -0500 X-Google-Smtp-Source: ACJfBosrrztC4YJRrd8Egro2Ft/4rla7T1KPcDoLSjtXON6YjbtqxdCwUugkfdVLhDGmnzJqGIqbNea4yoVNicoA4UI= MIME-Version: 1.0 In-Reply-To: <1514999361-2723-1-git-send-email-Anson.Huang@nxp.com> References: <1514999361-2723-1-git-send-email-Anson.Huang@nxp.com> From: Fabio Estevam Date: Thu, 4 Jan 2018 10:59:58 -0200 Message-ID: Subject: Re: [PATCH] clk: imx: imx7d: correct video pll clock tree To: Anson Huang Cc: linux-kernel , linux-clk@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , Fabio Estevam , Shawn Guo , Michael Turquette , Stephen Boyd , Sascha Hauer Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Wed, Jan 3, 2018 at 3:09 PM, Anson Huang wrote: > There is a test divider and post divider in video PLL, > test divider is placed before post divider, all clocks > that can select parent from video PLL should be from > post divider, NOT from pll_video_main, below are > clock tree dump before and after this patch: > > Before: > pll_video_main > pll_video_main_bypass > pll_video_main_clk > lcdif_pixel_src > lcdif_pixel_cg > lcdif_pixel_pre_div > lcdif_pixel_post_div > lcdif_pixel_root_clk > After: > pll_video_main > pll_video_main_bypass > pll_video_main_clk > pll_video_test_div > pll_video_post_div > lcdif_pixel_src > lcdif_pixel_cg > lcdif_pixel_pre_div > lcdif_pixel_post_div > lcdif_pixel_root_clk > > Signed-off-by: Anson Huang Reviewed-by: Fabio Estevam