Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932088AbeADPcI (ORCPT + 1 other); Thu, 4 Jan 2018 10:32:08 -0500 Received: from mx1.redhat.com ([209.132.183.28]:59802 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751522AbeADPcH (ORCPT ); Thu, 4 Jan 2018 10:32:07 -0500 Subject: Re: Avoid speculative indirect calls in kernel To: Andrew Cooper , "Woodhouse, David" , "pavel@ucw.cz" Cc: "tim.c.chen@linux.intel.com" , "linux-kernel@vger.kernel.org" , "torvalds@linux-foundation.org" , "tglx@linutronix.de" , "andi@firstfloor.org" , "gnomes@lxorguk.ukuu.org.uk" , "dave.hansen@intel.com" , "gregkh@linux-foundation.org" , Andrea Arcangeli References: <20180103230934.15788-1-andi@firstfloor.org> <20180104114231.GB1702@amd> <1515066469.12987.112.camel@amazon.co.uk> <94b12025-b27c-04d2-8726-c07a3af6b265@redhat.com> <7a3584c6-0c00-d807-5130-13d1f4b34102@citrix.com> From: Paolo Bonzini Message-ID: Date: Thu, 4 Jan 2018 16:32:01 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <7a3584c6-0c00-d807-5130-13d1f4b34102@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 04 Jan 2018 15:32:07 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 04/01/2018 15:51, Andrew Cooper wrote: > Where have you got this idea from?  Using IBPB on every mode switch > would be an insane overhead to take, and isn't necessary. IIRC it started as a paranoia mode for AMD, but then we found out it was actually faster than IBRS on some Intel processor where IBRS performance was horrible. But I don't remember the details of the performance testing, sorry. Paolo > Also, remember that PTI and these mitigations are for orthogonal issues. > > Perhaps it is easiest to refer directly to the Xen SP2 mitigations and > my commentary of what is going on: > http://xenbits.xen.org/gitweb/?p=people/andrewcoop/xen.git;a=blob;f=xen/arch/x86/spec_ctrl.c;h=79aedf774a390293dfd564ce978500085344e305;hb=refs/heads/sp2-mitigations-v6.5#l192 > > With the GCC -mindirect-branch=thunk-external support, and microcode, > Xen will make a boot-time choice between using Retpoline, Lfence (which > is the better AMD option, and more performant than retpoline), or IBRS > on Skylake and newer processors where it is strictly necessary, as well > as using IBPB whenever available. > > It also supports virtualising IBRS for guest usage when the kernel has > chosen not to use it; a configuration I haven't seen in any of the Linux > patch series thusfar. > > ~Andrew >