Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752392AbeADREF (ORCPT + 1 other); Thu, 4 Jan 2018 12:04:05 -0500 Received: from foss.arm.com ([217.140.101.70]:35232 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751798AbeADREE (ORCPT ); Thu, 4 Jan 2018 12:04:04 -0500 Subject: Re: [PATCH 08/11] arm64: KVM: Use per-CPU vector when BP hardening is enabled To: Ard Biesheuvel , Will Deacon Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Lorenzo Pieralisi , Christoffer Dall , Linux Kernel Mailing List References: <1515078515-13723-1-git-send-email-will.deacon@arm.com> <1515078515-13723-9-git-send-email-will.deacon@arm.com> From: Marc Zyngier Organization: ARM Ltd Message-ID: <060b7c34-bce9-da78-f9cb-2e67dd2ee142@arm.com> Date: Thu, 4 Jan 2018 17:04:01 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.2 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 04/01/18 16:28, Ard Biesheuvel wrote: > On 4 January 2018 at 15:08, Will Deacon wrote: >> From: Marc Zyngier >> >> Now that we have per-CPU vectors, let's plug then in the KVM/arm64 code. >> > > Why does bp hardening require per-cpu vectors? The description is not 100% accurate. We have per *CPU type* vectors. This stems from the following, slightly conflicting requirements: - We have systems with more than one CPU type (think big-little) - Different implementations require different BP hardening sequences - The BP hardening sequence must be executed before doing any branch The natural solution is to have one set of vectors per CPU type, containing the BP hardening sequence for that particular implementation, ending with a branch to the common code. M. -- Jazz is not dead. It just smells funny...