Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750990AbeADS3C (ORCPT + 1 other); Thu, 4 Jan 2018 13:29:02 -0500 Received: from mail.skyhub.de ([5.9.137.197]:50222 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750791AbeADS3A (ORCPT ); Thu, 4 Jan 2018 13:29:00 -0500 Date: Thu, 4 Jan 2018 19:28:58 +0100 From: Borislav Petkov To: Tim Chen Cc: Thomas Gleixner , Andy Lutomirski , Linus Torvalds , Greg KH , Dave Hansen , Andrea Arcangeli , Andi Kleen , Arjan Van De Ven , linux-kernel@vger.kernel.org Subject: Re: [PATCH 7/7] x86/microcode: Recheck IBRS features on microcode reload Message-ID: <20180104182858.2nevvgeq5wdojz2w@pd.tnic> References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Thu, Jan 04, 2018 at 09:56:48AM -0800, Tim Chen wrote: > On new microcode write, check whether IBRS > is present by rescanning scattered CPU features. > > Signed-off-by: Tim Chen > --- > arch/x86/kernel/cpu/microcode/core.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c > index c4fa4a8..44b9355 100644 > --- a/arch/x86/kernel/cpu/microcode/core.c > +++ b/arch/x86/kernel/cpu/microcode/core.c > @@ -40,6 +40,7 @@ > #include > #include > #include > +#include > > #define DRIVER_VERSION "2.2" > > @@ -444,6 +445,11 @@ static ssize_t microcode_write(struct file *file, const char __user *buf, > if (ret > 0) > perf_check_microcode(); > > + /* check spec_ctrl capabilities */ > + mutex_lock(&spec_ctrl_mutex); > + init_scattered_cpuid_features(&boot_cpu_data); No need for that - make a specific function like perf_check_microcode() which checks only the IBRS bit and updates stuff accordingly. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.