Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752732AbeADSfD (ORCPT + 1 other); Thu, 4 Jan 2018 13:35:03 -0500 Received: from mail-it0-f68.google.com ([209.85.214.68]:37170 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751829AbeADSfC (ORCPT ); Thu, 4 Jan 2018 13:35:02 -0500 X-Google-Smtp-Source: ACJfBotU4vsiB45HDiJt6praZQEtSoxGViCi12rSZR9shK+dTHCDkJF6qJzmVTzXOR1Lmm45aBQwpEzvgEM1qqNwCsQ= MIME-Version: 1.0 In-Reply-To: <20180104183158.GM13436@arm.com> References: <1515078515-13723-1-git-send-email-will.deacon@arm.com> <1515078515-13723-2-git-send-email-will.deacon@arm.com> <20180104183158.GM13436@arm.com> From: Ard Biesheuvel Date: Thu, 4 Jan 2018 18:35:01 +0000 Message-ID: Subject: Re: [PATCH 01/11] arm64: use RET instruction for exiting the trampoline To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, Catalin Marinas , Marc Zyngier , Lorenzo Pieralisi , Christoffer Dall , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 4 January 2018 at 18:31, Will Deacon wrote: > Hi Ard, > > On Thu, Jan 04, 2018 at 04:24:22PM +0000, Ard Biesheuvel wrote: >> On 4 January 2018 at 15:08, Will Deacon wrote: >> > Speculation attacks against the entry trampoline can potentially resteer >> > the speculative instruction stream through the indirect branch and into >> > arbitrary gadgets within the kernel. >> > >> > This patch defends against these attacks by forcing a misprediction >> > through the return stack: a dummy BL instruction loads an entry into >> > the stack, so that the predicted program flow of the subsequent RET >> > instruction is to a branch-to-self instruction which is finally resolved >> > as a branch to the kernel vectors with speculation suppressed. >> > >> > Signed-off-by: Will Deacon >> > --- >> > arch/arm64/kernel/entry.S | 5 ++++- >> > 1 file changed, 4 insertions(+), 1 deletion(-) >> > >> > diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S >> > index 031392ee5f47..b9feb587294d 100644 >> > --- a/arch/arm64/kernel/entry.S >> > +++ b/arch/arm64/kernel/entry.S >> > @@ -1029,6 +1029,9 @@ alternative_else_nop_endif >> > .if \regsize == 64 >> > msr tpidrro_el0, x30 // Restored in kernel_ventry >> > .endif >> > + bl 2f >> > + b . >> > +2: >> >> This deserves a comment, I guess? > > Yeah, I suppose ;) I'll lift something out of the commit message. > >> Also, is deliberately unbalancing the return stack likely to cause >> performance problems, e.g., in libc hot paths? > > I don't think so, because it remains balanced after this code. We push an > entry on with the BL and pop it with the RET; the rest of the return stack > remains unchanged. Ah, of course. For some reason, I had it in my mind that the failed prediction affects the state of the return stack but that doesn't make sense. > That said, I'm also not sure what we could do differently > here! > > Will