Date: Thu, 4 Jan 2018 11:08:37 -0800
From: Nicolin Chen <nicoleotsuka@gmail.com>
To: "Maciej S. Szmigiero" <mail@maciej.szmigiero.name>
Cc: timur@tabi.org, broonie@kernel.org, linux-kernel@vger.kernel.org,
        linuxppc-dev@lists.ozlabs.org, alsa-devel@alsa-project.org,
        lgirdwood@gmail.com, fabio.estevam@nxp.com, caleb@crome.org,
        arnaud.mouiche@invoxia.com, lukma@denx.de, kernel@pengutronix.de
Subject: Re: [PATCH v1 01/15] ASoC: fsl_ssi: Clean up set_dai_tdm_slot()
Message-ID: <20180104190836.GB27975@Asurada-Nvidia>
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 <b910e12c-bee7-18ba-f878-bece9a9f9cc1@maciej.szmigiero.name>
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On Mon, Jan 01, 2018 at 07:39:52PM +0100, Maciej S. Szmigiero wrote:

> >  	/* The slot number should be >= 2 if using Network mode or I2S mode */
> > -	regmap_read(regs, REG_SSI_SCR, &val);
> > -	val &= SSI_SCR_I2S_MODE_MASK | SSI_SCR_NET;
> > -	if (val && slots < 2) {
> > +	if (ssi->i2s_net && slots < 2) {
> >  		dev_err(dai->dev, "slot number should be >= 2 in I2S or NET\n");
> >  		return -EINVAL;
> >  	}
> 
> Are you sure that ssi->i2s_net SSI_SCR_I2S_MODE_MASK | SSI_SCR_NET bits
> (also known as SSI_SCR_I2S_NET_MASK) zero or non-zero status is always
> consistent with that in the SCR register?
> 
> I can see that in fsl_ssi_hw_params() these bits in SCR are zeroed in
> a one special case and in the second special case they are hardcoded
> to SSI_SCR_I2S_MODE_NORMAL | SSI_SCR_NET, in both cases regardless of
> what is currently in ssi->i2s_net.

You are right. I should update the i2s_net in hw_params() too. Thanks!