Subject: Re: [PATCH 5/7] x86: Use IBRS for firmware update path
To: Greg KH <gregkh@linuxfoundation.org>,
        Tim Chen <tim.c.chen@linux.intel.com>
CC: Thomas Gleixner <tglx@linutronix.de>,
        Andy Lutomirski <luto@kernel.org>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Dave Hansen <dave.hansen@intel.com>,
        Andrea Arcangeli <aarcange@redhat.com>,
        Andi Kleen <ak@linux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@intel.com>,
        <linux-kernel@vger.kernel.org>, David Woodhouse <dwmw@amazon.co.uk>
References: <cover.1515086770.git.tim.c.chen@linux.intel.com>
 <8d3710432534b27d224283557c4629cd1aa5b0ea.1515086770.git.tim.c.chen@linux.intel.com>
 <20180104200515.GC30228@kroah.com>
From: Andrew Cooper <andrew.cooper3@citrix.com>
Message-ID: <89141051-bdce-fe86-9ae8-df7862e65870@citrix.com>
Date: Thu, 4 Jan 2018 20:21:32 +0000
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On 04/01/18 20:05, Greg KH wrote:
> On Thu, Jan 04, 2018 at 09:56:46AM -0800, Tim Chen wrote:
>> From: David Woodhouse <dwmw@amazon.co.uk>
>>
>> We are impervious to the indirect branch prediction attack with retpoline
>> but firmware won't be, so we still need to set IBRS to protect
>> firmware code execution when calling into firmware at runtime.
> Wait, what?
>
> Maybe it's just the wine from dinner talking, but if the firmware has
> issues, we have bigger things to worry about here, right?  It already
> handed over the "chain of trust" to us, so we have already implicitly
> trusted that the firmware was correct here.  So why do we need to do
> anything about firmware calls in this manner?
>
> Or am I totally missing something else here?

The firmware doesn't have to be malicious to cause problems for the OS.

There is still an open question of what happens in the RSB-to-SMM case,
where the SMM handler empties the RSB just before supervisor code
executes a ret instruction.  Hardware (other than the Skylake+ case
which uses a BTB prediction) speculates to the stale top-of-RSB entry,
for want of anything better to do.  (AMD have confirmed this, Intel
haven't replied to my query yet.)

Therefore, a crafty piece of userspace can stick a speculative leaky
gadget at a linear address which aliases the SMM code, and wait for an
SMI to hit.

To mitigate, a kernel has to hope that the SMM handler doesn't run in a
non-identity mappings, and either rely on SMEP being active, or disallow
userspace mmap()'s covering the SMM region.

True, exploiting this is probably on the upper end of the difficulty
scale here, but I'm willing to be its not the only unexpected
interaction going.

~Andrew