Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751603AbeAEKcC (ORCPT + 1 other); Fri, 5 Jan 2018 05:32:02 -0500 Received: from 9pmail.ess.barracuda.com ([64.235.150.224]:41060 "EHLO 9pmail.ess.barracuda.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751347AbeAEKcA (ORCPT ); Fri, 5 Jan 2018 05:32:00 -0500 From: Matt Redfearn To: Ralf Baechle , Thomas Gleixner CC: , Matt Redfearn , , Philippe Ombredanne , Kate Stewart , Greg Kroah-Hartman Subject: [PATCH 1/6] MIPS: Move ehb() to barrier.h Date: Fri, 5 Jan 2018 10:31:05 +0000 Message-ID: <1515148270-9391-2-git-send-email-matt.redfearn@mips.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515148270-9391-1-git-send-email-matt.redfearn@mips.com> References: <1515148270-9391-1-git-send-email-matt.redfearn@mips.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.150.130.83] X-BESS-ID: 1515148313-298553-16969-110147-1 X-BESS-VER: 2017.16-r1712230000 X-BESS-Apparent-Source-IP: 12.201.5.28 X-BESS-Outbound-Spam-Score: 0.50 X-BESS-Outbound-Spam-Report: Code version 3.2, rules version 3.2.2.188674 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------- 0.50 BSF_RULE7568M META: Custom Rule 7568M 0.00 BSF_BESS_OUTBOUND META: BESS Outbound X-BESS-Outbound-Spam-Status: SCORE=0.50 using account:ESS59374 scores of KILL_LEVEL=7.0 tests=BSF_RULE7568M, BSF_BESS_OUTBOUND X-BESS-BRTS-Status: 1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: The current location of ehb() in mipsmtregs.h does not make sense, since it is not strictly related to multi-threading, and may be used in code which does not include mipsmtregs.h Signed-off-by: Matt Redfearn --- arch/mips/include/asm/barrier.h | 13 +++++++++++++ arch/mips/include/asm/mipsmtregs.h | 8 -------- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index a5eb1bb199a7..a98fd8a2bba2 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -222,6 +222,19 @@ #define __smp_mb__before_atomic() __smp_mb__before_llsc() #define __smp_mb__after_atomic() smp_llsc_mb() +/** + * ehb() - Execution Hazard Barrier + * + * Stop instruction execution until execution hazards are cleared + */ +static inline void ehb(void) +{ + __asm__ __volatile__( + " .set mips32r2 \n" + " ehb \n" + " .set mips0 \n"); +} + #include #endif /* __ASM_BARRIER_H */ diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h index 212336b7c0f4..4acfc78bc504 100644 --- a/arch/mips/include/asm/mipsmtregs.h +++ b/arch/mips/include/asm/mipsmtregs.h @@ -274,14 +274,6 @@ static inline void emt(int previous) __raw_emt(); } -static inline void ehb(void) -{ - __asm__ __volatile__( - " .set mips32r2 \n" - " ehb \n" - " .set mips0 \n"); -} - #define mftc0(rt,sel) \ ({ \ unsigned long __res; \ -- 2.7.4