Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751914AbeAENJu (ORCPT + 1 other); Fri, 5 Jan 2018 08:09:50 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:44468 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751278AbeAENJt (ORCPT ); Fri, 5 Jan 2018 08:09:49 -0500 Date: Fri, 5 Jan 2018 14:09:43 +0100 (CET) From: Thomas Gleixner To: Tim Chen cc: Andy Lutomirski , Linus Torvalds , Greg KH , Dave Hansen , Andrea Arcangeli , Andi Kleen , Arjan Van De Ven , linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/7] x86/feature: Detect the x86 feature to control Speculation In-Reply-To: <427aa76dea14532dea7e49f0bce4e7cf1dea7c6f.1515086770.git.tim.c.chen@linux.intel.com> Message-ID: References: <427aa76dea14532dea7e49f0bce4e7cf1dea7c6f.1515086770.git.tim.c.chen@linux.intel.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Thu, 4 Jan 2018, Tim Chen wrote: > +#define MSR_IA32_SPEC_CTRL 0x00000048 > +#define SPEC_CTRL_FEATURE_DISABLE_IBRS (0 << 0) > +#define SPEC_CTRL_FEATURE_ENABLE_IBRS (1 << 0) > + > +#define MSR_IA32_PRED_CMD 0x00000049 > + > #define MSR_IA32_PERFCTR0 0x000000c1 > #define MSR_IA32_PERFCTR1 0x000000c2 > #define MSR_FSB_FREQ 0x000000cd > @@ -439,6 +445,7 @@ > #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1) > #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2) > #define FEATURE_CONTROL_LMCE (1<<20) > +#define FEATURE_SET_IBPB (1<<0) So how is that bit related to the control bits above? This file is structured in obvious ways .... Thanks, tglx