Message-ID: <1515164061.3305.17.camel@debian.org>
Subject: Re: [PATCH 0/7] IBRS patch series
From: Yves-Alexis Perez <corsac@debian.org>
To: Paolo Bonzini <pbonzini@redhat.com>,
        Greg KH <gregkh@linuxfoundation.org>
Cc: Henrique de Moraes Holschuh <hmh@debian.org>,
        Tim Chen <tim.c.chen@linux.intel.com>,
        Justin Forbes <jmforbes@linuxtx.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Andy Lutomirski <luto@kernel.org>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Dave Hansen <dave.hansen@intel.com>,
        Andrea Arcangeli <aarcange@redhat.com>,
        Andi Kleen <ak@linux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@intel.com>,
        linux-kernel@vger.kernel.org
Date: Fri, 05 Jan 2018 15:54:21 +0100
In-Reply-To: <2b40f988-e773-97a5-77ca-de0908887ae2@redhat.com>
References: <cover.1515086770.git.tim.c.chen@linux.intel.com>
         <CAFxkdAqJtPEQ-wTu2-yc7EWz2BRwDsiztL+=-VsJpNq3e0_SSA@mail.gmail.com>
         <2c1e7299-56ea-07ec-8077-471f17ad3c79@linux.intel.com>
         <1515099712.30693.22.camel@debian.org> <20180105132856.GA12036@kroah.com>
         <1515160065.3305.6.camel@debian.org> <20180105140145.GA24434@kroah.com>
         <2b40f988-e773-97a5-77ca-de0908887ae2@redhat.com>
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On Fri, 2018-01-05 at 15:26 +0100, Paolo Bonzini wrote:
> Those from November seem way too early to include IBRS/IBPB.  Maybe the
> two from December 3rd, but I wouldn't be 100% sure.

So, for my CPU with updated microcode:

processor	: 0
vendor_id	: GenuineIntel
cpu family	: 6
model		: 61
model name	: Intel(R) Core(TM) i5-5200U CPU @ 2.20GHz
stepping	: 4
microcode	: 0x28

cpuid returns:

   0x00000007 0x00: eax=3D0x00000000 ebx=3D0x021c27ab ecx=3D0x00000000
edx=3D0x0c000000

So bit 26/27 are set, which as I understand means IBRS is supported (but I
would appreciate any pointer to relevant documentation on this).
>=20
> So it would be even nicer to know how those microcode updates were tested=
.

At least I didn't test IBRS/IBPB here. I could do it provided I'm pointed t=
o a
tree with all the things to test.
>=20
> (And by the way, the LFENCE change is for variant 1 aka CVE-2017-5753).

Ok, good to know. Is the kernel support part for LFENCE in the same thread =
(I
have to admit I'm a bit lost).

Regards,
--=20
Yves-Alexis
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