Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752031AbeAEOyu (ORCPT + 1 other); Fri, 5 Jan 2018 09:54:50 -0500 Received: from Galois.linutronix.de ([146.0.238.70]:44776 "EHLO Galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751999AbeAEOyr (ORCPT ); Fri, 5 Jan 2018 09:54:47 -0500 Date: Fri, 5 Jan 2018 15:54:35 +0100 (CET) From: Thomas Gleixner To: Andrea Arcangeli cc: "Van De Ven, Arjan" , Linus Torvalds , David Woodhouse , Tim Chen , Andy Lutomirski , Greg KH , "Hansen, Dave" , Andi Kleen , Linux Kernel Mailing List Subject: Re: [PATCH 0/7] IBRS patch series In-Reply-To: <20180105144340.GF26807@redhat.com> Message-ID: References: <1515093549.29312.11.camel@infradead.org> <0575AF4FD06DD142AD198903C74E1CC87A56A873@ORSMSX103.amr.corp.intel.com> <20180105144340.GF26807@redhat.com> User-Agent: Alpine 2.20 (DEB 67 2015-01-07) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Fri, 5 Jan 2018, Andrea Arcangeli wrote: > On Thu, Jan 04, 2018 at 09:22:34PM +0000, Van De Ven, Arjan wrote: > > personally I am comfortable with retpoline on Skylake, but I would > >like to have IBRS as an opt in for the paranoid. > > I think this whole variant#2 issue has to be fixed mathematically or > not at all, the reason is that it's already "near zero risk" to begin > with. > > If we leave any theoretical issues open we can as well stick with the > "near zero risk" wording on AMD website and not fix anything. > > Doing a huge amount of work with reptoline and then you find SMM is > called reproducibly somehow and a new PoC could exist for it, not fun. > > Whatever solution should be total and guaranteed or there's huge > amount of resources wasted. > > Again spectre variant#2 this is "near zero risk" to begin with, on all > CPUs because of the complexity to mount an attack on any given > kernel/CPU combination out there. I'm mostly thinking about the "guest > mode"/"host kernel mod" isolation here but this should apply in > general to all kernel protection for spectre variant#2. > > If we can do a 3 way alternative IBRS on skylake, repotline + IBRS > around all BIOS, graphics firmware and pci firmware + kernel asm > patched with a 2-way alternative between amd reptoline and intel > reptoline emitted 2-way by same gcc build, and still guarantee this > solution is as mathematically safe as a pure IBRS (which is obviously > mathematically safe), ok. Otherwise it'd prefer to stick to pure IBRS > and skip the reptoline complexity and fallouts here and there around > bios asm firmware SMM etc.. not to tell the need to rebuild qemu with > reptoline with 2-way amd/intel alternatives self modifying code in > userland during qemu startup to achieve ibrs 1 ibpb 1 + prctl IBRS on > qemu with repotline. I agree. The amount of options we get plus the desire to do prctl/cgroup and whatever based enable/disable makes me nervous as hell. Especially the per task/process/cgroup runtime magic is bound to dig yet another hole of speculation attack vector into the existing mess. Thanks, tglx