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Subject: Re: [PATCH v1 1/3] x86/cpu/AMD: Make LFENCE a serializing instruction
To: Brian Gerst <brgerst@gmail.com>
Cc: the arch/x86 maintainers <x86@kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
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        Paul Turner <pjt@google.com>
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From: Tom Lendacky <thomas.lendacky@amd.com>
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Date: Fri, 5 Jan 2018 10:36:40 -0600
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On 1/5/2018 10:35 AM, Brian Gerst wrote:
> On Fri, Jan 5, 2018 at 11:07 AM, Tom Lendacky <thomas.lendacky@amd.com> wrote:
>> To aid in speculation control, make LFENCE a serializing instruction.
>> This is done by setting bit 1 of MSR 0xc0011029 (DE_CFG).  Some families
>> that support LFENCE do not have this MSR.  For these families, the LFENCE
>> instruction is already serializing.
> 
> Does this require a microcode update?

No, it doesn't.

Thanks,
Tom

> 
> --
> Brian Gerst
>