Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752740AbeAEXCI (ORCPT + 1 other); Fri, 5 Jan 2018 18:02:08 -0500 Received: from mail-wm0-f50.google.com ([74.125.82.50]:40585 "EHLO mail-wm0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752493AbeAEXCE (ORCPT ); Fri, 5 Jan 2018 18:02:04 -0500 X-Google-Smtp-Source: ACJfBovhUO3Gr9uVsQHFFiV51BoqeQkOB/5P88HsYpERrDirlT6eNEUOBthxb8stOxa+jeh1PmCFyg== From: Kevin Hilman To: Yixun Lan Cc: , Neil Armstrong , Jerome Brunet , Rob Herring , Mark Rutland , Carlo Caione , Qiufang Dai , Jian Hu , , , , Subject: Re: [PATCH v8] arm64: dts: meson-axg: switch uart_ao clock to CLK81 Organization: BayLibre References: <20171215141741.175985-1-yixun.lan@amlogic.com> Date: Fri, 05 Jan 2018 15:01:58 -0800 In-Reply-To: <20171215141741.175985-1-yixun.lan@amlogic.com> (Yixun Lan's message of "Fri, 15 Dec 2017 22:17:41 +0800") Message-ID: <7hvagf29ll.fsf@baylibre.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.5 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Yixun Lan writes: > Switch the uart_ao pclk to CLK81 since the clock driver is ready. > > Signed-off-by: Yixun Lan Applied to v4.16/dt64 with Neil's tag. Kevin