Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755870AbeAHSfr (ORCPT + 1 other); Mon, 8 Jan 2018 13:35:47 -0500 Received: from userp2130.oracle.com ([156.151.31.86]:36506 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755561AbeAHSfo (ORCPT ); Mon, 8 Jan 2018 13:35:44 -0500 Date: Mon, 8 Jan 2018 13:35:29 -0500 From: Konrad Rzeszutek Wilk To: Paolo Bonzini Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, jmattson@google.com, aliguori@amazon.com, thomas.lendacky@amd.com, dwmw@amazon.co.uk, bp@alien8.de Subject: Re: [PATCH 2/7] x86/msr: add definitions for indirect branch predictor MSRs Message-ID: <20180108183529.GD17375@char.us.oracle.com> References: <1515434925-10250-1-git-send-email-pbonzini@redhat.com> <1515434925-10250-3-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1515434925-10250-3-git-send-email-pbonzini@redhat.com> User-Agent: Mutt/1.8.3 (2017-05-23) X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8768 signatures=668652 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1801080263 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Mon, Jan 08, 2018 at 07:08:40PM +0100, Paolo Bonzini wrote: > KVM will start using them soon. Perhaps include a bit of description? > > Signed-off-by: Paolo Bonzini > --- > arch/x86/include/asm/msr-index.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 03ffde6217d0..ec08f1d8d39b 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -39,6 +39,11 @@ > > /* Intel MSRs. Some also available on other CPUs */ > > +#define MSR_IA32_SPEC_CTRL 0x00000048 > + > +#define MSR_IA32_PRED_CMD 0x00000049 > +#define FEATURE_SET_IBPB (1UL << 0) > + > #define MSR_PPIN_CTL 0x0000004e > #define MSR_PPIN 0x0000004f > > -- > 1.8.3.1 > >