Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932340AbeAHTLR (ORCPT + 1 other); Mon, 8 Jan 2018 14:11:17 -0500 Received: from userp2130.oracle.com ([156.151.31.86]:35026 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932157AbeAHTLP (ORCPT ); Mon, 8 Jan 2018 14:11:15 -0500 Message-ID: <5A53C23F.1040305@ORACLE.COM> Date: Mon, 08 Jan 2018 21:10:55 +0200 From: Liran Alon User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org CC: jmattson@google.com, aliguori@amazon.com, thomas.lendacky@amd.com, dwmw@amazon.co.uk, bp@alien8.de Subject: Re: [PATCH 2/7] x86/msr: add definitions for indirect branch predictor MSRs References: <1515434925-10250-1-git-send-email-pbonzini@redhat.com> <1515434925-10250-3-git-send-email-pbonzini@redhat.com> In-Reply-To: <1515434925-10250-3-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8768 signatures=668652 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1801080271 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 08/01/18 20:08, Paolo Bonzini wrote: > KVM will start using them soon. > > Signed-off-by: Paolo Bonzini > --- > arch/x86/include/asm/msr-index.h | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index 03ffde6217d0..ec08f1d8d39b 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -39,6 +39,11 @@ > > /* Intel MSRs. Some also available on other CPUs */ > > +#define MSR_IA32_SPEC_CTRL 0x00000048 > + > +#define MSR_IA32_PRED_CMD 0x00000049 > +#define FEATURE_SET_IBPB (1UL << 0) > + > #define MSR_PPIN_CTL 0x0000004e > #define MSR_PPIN 0x0000004f > > Trivially, Reviewed-by: Liran Alon