Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933729AbeAHTt7 (ORCPT + 1 other); Mon, 8 Jan 2018 14:49:59 -0500 Received: from mail-wr0-f178.google.com ([209.85.128.178]:38164 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932750AbeAHTt4 (ORCPT ); Mon, 8 Jan 2018 14:49:56 -0500 X-Google-Smtp-Source: ACJfBotbRUZlEyhr3M2sg/TxYvysdRZKopBGBB5IdbkThzrb4WQUmyD4fe/aZ8FwvfpAMUHHd00VFA== Date: Mon, 8 Jan 2018 12:49:50 -0700 From: Jason Gunthorpe To: Christoph Hellwig Cc: Logan Gunthorpe , open list , linux-pci@vger.kernel.org, linux-nvme@lists.infradead.org, linux-rdma , linux-nvdimm@lists.01.org, linux-block@vger.kernel.org, Stephen Bates , Jens Axboe , Keith Busch , Sagi Grimberg , Bjorn Helgaas , Max Gurtovoy , Dan Williams , =?utf-8?B?SsOpcsO0bWU=?= Glisse , Benjamin Herrenschmidt Subject: Re: [PATCH 06/12] IB/core: Add optional PCI P2P flag to rdma_rw_ctx_[init|destroy]() Message-ID: <20180108194950.GK11348@ziepe.ca> References: <20180104192225.GS11348@ziepe.ca> <1f8fb3fb-e3dc-94d3-e837-0cd942cf5b87@deltatee.com> <20180104221337.GV11348@ziepe.ca> <3e8391a9-8924-be6d-8c43-162a360d75b6@deltatee.com> <20180105045031.GX11348@ziepe.ca> <20180108145901.GA10743@lst.de> <20180108180917.GF11348@ziepe.ca> <20180108183434.GA15549@lst.de> <20180108185743.GA15936@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20180108185743.GA15936@lst.de> X-Originating-IP: [70.74.179.152] User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Mon, Jan 8, 2018 at 11:57 AM, Christoph Hellwig wrote: >> (c) setup/manage any security permissions on mappings >> Which P2P may at some point be concerned with. > > Maybe once root complexes with iommus actually support P2P. But until > then we have a lot more more important problems to solve. Pretty sure P2P capable IOMMU hardware exists. With SOC's we also have the scenario that an DMA originated from an on-die device wishes to target an off-die PCI BAR (through the IOMMU), that definitely exists today, and people care about it :) Jason