Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932994AbeAHUMq (ORCPT + 1 other); Mon, 8 Jan 2018 15:12:46 -0500 Received: from userp2130.oracle.com ([156.151.31.86]:39860 "EHLO userp2130.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754478AbeAHUMo (ORCPT ); Mon, 8 Jan 2018 15:12:44 -0500 Message-ID: <5A53CF7E.6020508@ORACLE.COM> Date: Mon, 08 Jan 2018 22:07:26 +0200 From: Liran Alon User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org CC: jmattson@google.com, aliguori@amazon.com, thomas.lendacky@amd.com, dwmw@amazon.co.uk, bp@alien8.de Subject: Re: [PATCH 7/7] KVM: x86: add SPEC_CTRL and IBPB_SUPPORT to MSR and CPUID lists References: <1515434925-10250-1-git-send-email-pbonzini@redhat.com> <1515434925-10250-8-git-send-email-pbonzini@redhat.com> In-Reply-To: <1515434925-10250-8-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8768 signatures=668652 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1801080286 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 08/01/18 20:08, Paolo Bonzini wrote: > Expose them to userspace, now that guests can use them. > I am not adding cpufeatures here to avoid having a kernel > that shows spec_ctrl in /proc/cpuinfo and actually has no > support whatsoever for IBRS/IBPB. Keep the ugly special-casing > for now, and clean it up once the generic arch/x86/ code > learns about them. > > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/cpuid.c | 24 +++++++++++++++++++++--- > arch/x86/kvm/x86.c | 1 + > 2 files changed, 22 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 767af697c20c..5f43a5940275 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -397,7 +397,12 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > > /* cpuid 7.0.edx*/ > const u32 kvm_cpuid_7_0_edx_x86_features = > - KF(AVX512_4VNNIW) | KF(AVX512_4FMAPS); > + KF(AVX512_4VNNIW) | KF(AVX512_4FMAPS) | > + KF(SPEC_CTRL) | KF(STIBP); > + > + /* cpuid 0x80000008.edx */ > + const u32 kvm_cpuid_80000008_ebx_x86_features = > + KF(IBPB_SUPPORT); > > /* all calls to cpuid_count() should be made on the same cpu */ > get_cpu(); > @@ -483,7 +488,14 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE)) > entry->ecx &= ~F(PKU); > entry->edx &= kvm_cpuid_7_0_edx_x86_features; > - entry->edx &= get_scattered_cpuid_leaf(7, 0, CPUID_EDX); > + /* > + * FIXME: the special casing of SPEC_CTRL and STIBP > + * can be removed once they become regular > + * cpufeatures. > + */ > + entry->edx &= ( > + get_scattered_cpuid_leaf(7, 0, CPUID_EDX) | > + KF(SPEC_CTRL) | KF(STIBP)); > } else { > entry->ebx = 0; > entry->ecx = 0; > @@ -651,7 +663,13 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > if (!g_phys_as) > g_phys_as = phys_as; > entry->eax = g_phys_as | (virt_as << 8); > - entry->ebx = entry->edx = 0; > + /* > + * FIXME: mask against cpufeatures, with > + * get_scattered_cpuid_leaf(0x80000008, 0, CPUID_EBX), > + * once IBPB_SUPPORT becomes a regular cpufeature. > + */ > + entry->ebx &= kvm_cpuid_80000008_ebx_x86_features; > + entry->edx = 0; > break; > } > case 0x80000019: > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index daa1918031df..4abb37d9f4d8 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -1032,6 +1032,7 @@ unsigned int kvm_get_pt_addr_cnt(void) > MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B, > MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B, > MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B, > + MSR_IA32_SPEC_CTRL, > }; > > static unsigned num_msrs_to_save; > Reviewed-by: Liran Alon