Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932205AbeAHWcU (ORCPT + 1 other); Mon, 8 Jan 2018 17:32:20 -0500 Received: from gate2.alliedtelesis.co.nz ([202.36.163.20]:50618 "EHLO gate2.alliedtelesis.co.nz" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753851AbeAHWcS (ORCPT ); Mon, 8 Jan 2018 17:32:18 -0500 From: Chris Packham To: jlu@pengutronix.de, linux@armlinux.org.uk, bp@alien8.de, linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH 0/3] EDAC: support for Armada 38x and 98dx3236 SoCs Date: Tue, 9 Jan 2018 11:31:55 +1300 Message-Id: <20180108223158.21930-1-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.15.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: This series applies on top of Jan Lubbe's "EDAC drivers for Armada XP L2 and DDR" series[1]. The Armada 38x as well as the 98dx3236 and similar switch chips with integrated CPUs use the same SDRAM controller block as the Armada XP. The key difference is the width of the DDR interface. [1] - https://marc.info/?l=linux-edac&m=151030475715706&w=2 Chris Packham (3): ARM: dts: enable L2 cache parity and ecc on db-xc3-24g4xg board ARM: dts: mvebu: add sdram controller node to Armada-38x EDAC: armada_xp: Add support for more SoCs arch/arm/boot/dts/armada-38x.dtsi | 5 +++++ arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts | 5 +++++ drivers/edac/armada_xp_edac.c | 5 +++++ 3 files changed, 15 insertions(+) -- 2.15.1