Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933904AbeAHXwR (ORCPT + 1 other); Mon, 8 Jan 2018 18:52:17 -0500 Received: from mail.skyhub.de ([5.9.137.197]:37850 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933870AbeAHXwP (ORCPT ); Mon, 8 Jan 2018 18:52:15 -0500 Date: Tue, 9 Jan 2018 00:52:01 +0100 From: Borislav Petkov To: Tom Lendacky Cc: x86@kernel.org, linux-kernel@vger.kernel.org, Peter Zijlstra , Linus Torvalds , Dan Williams , Dave Hansen , Thomas Gleixner , Tim Chen , Greg Kroah-Hartman , David Woodhouse , Paul Turner Subject: Re: [PATCH v2 0/2] x86/cpu/AMD: Make LFENCE a serializing instruction on AMD Message-ID: <20180108235201.6dezaklw57rmfugg@pd.tnic> References: <20180108220912.12580.82330.stgit@tlendack-t1.amdoffice.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20180108220912.12580.82330.stgit@tlendack-t1.amdoffice.net> User-Agent: NeoMutt/20170609 (1.8.3) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Mon, Jan 08, 2018 at 04:09:12PM -0600, Tom Lendacky wrote: > To aid in speculation control, the LFENCE instruction will be turned into > a serializing instruction. There is less performance impact using LFENCE > in this way compared to MFENCE. > > With LFENCE now being a serializing instruction, it can be also used in > rdtsc_ordered() in preference to MFENCE_RDTSC. Since the kernel could > be running under a hypervisor that does not allow writing to that MSR, > it must be first verified that the write was successful before setting > the LFENCE_RDTSC feature. > > The following patches are included in this series: > - Make LFENCE a serializing instruction on AMD > - Use LFENCE_RDTSC in preference to MFENCE_RDTSC on AMD > > This patch series is based on tip:x86/pti. > > --- > > Changes from v1: > - Add a check verifying the MSR was actually updated > - Remove the third patch that eliminates the MFENCE_RDTSC feature > (since the feature is still needed) > - Adding Dan Williams to the cc since this will impact nospec_barrier(), > which will require an alternative_2 to add an MFENCE instruction with > an MFENCE_RDTSC check > > Tom Lendacky (2): > x86/cpu/AMD: Make LFENCE a serializing instruction > x86/cpu/AMD: Use LFENCE_RDTSC in preference to MFENCE_RDTSC Looks good to me. Reviewed-by: Borislav Petkov -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.