Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932641AbeAILO4 (ORCPT + 1 other); Tue, 9 Jan 2018 06:14:56 -0500 Received: from mx1.redhat.com ([209.132.183.28]:43278 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932219AbeAILOx (ORCPT ); Tue, 9 Jan 2018 06:14:53 -0500 Subject: Re: [PATCH 1/7] KVM: x86: add SPEC_CTRL and IBPB_SUPPORT accessors To: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org Cc: jmattson@google.com, aliguori@amazon.com, thomas.lendacky@amd.com, dwmw@amazon.co.uk, bp@alien8.de References: <1515434925-10250-1-git-send-email-pbonzini@redhat.com> <1515434925-10250-2-git-send-email-pbonzini@redhat.com> From: David Hildenbrand Organization: Red Hat GmbH Message-ID: Date: Tue, 9 Jan 2018 12:14:50 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <1515434925-10250-2-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Tue, 09 Jan 2018 11:14:53 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 08.01.2018 19:08, Paolo Bonzini wrote: > As an interim measure until SPEC_CTRL is supported by upstream > Linux in cpufeatures, add a function that lets vmx.c and svm.c > know whether to save/restore MSR_IA32_SPEC_CTRL. > > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/cpuid.c | 3 --- > arch/x86/kvm/cpuid.h | 22 ++++++++++++++++++++++ > 2 files changed, 22 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 8e9a07c557f1..767af697c20c 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -67,9 +67,6 @@ u64 kvm_supported_xcr0(void) > > #define F(x) bit(X86_FEATURE_##x) > > -/* These are scattered features in cpufeatures.h. */ > -#define KVM_CPUID_BIT_AVX512_4VNNIW 2 > -#define KVM_CPUID_BIT_AVX512_4FMAPS 3 > #define KF(x) bit(KVM_CPUID_BIT_##x) > > int kvm_update_cpuid(struct kvm_vcpu *vcpu) > diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h > index c2cea6651279..8d04ccf177ce 100644 > --- a/arch/x86/kvm/cpuid.h > +++ b/arch/x86/kvm/cpuid.h > @@ -155,6 +155,28 @@ static inline int guest_cpuid_stepping(struct kvm_vcpu *vcpu) > return x86_stepping(best->eax); > } > > +/* These are scattered features in cpufeatures.h. */ > +#define KVM_CPUID_BIT_AVX512_4VNNIW 2 > +#define KVM_CPUID_BIT_AVX512_4FMAPS 3 > +#define KVM_CPUID_BIT_SPEC_CTRL 26 > +#define KVM_CPUID_BIT_STIBP 27 I can see that STIBP is never checked in KVM code but only forwarded to the guest if available. I am wondering if we would have to check against that, too, before issuing a FEATURE_SET_IBPB. (can somebody point me at the intel documentation?) > + > +/* CPUID[eax=0x80000008].ebx */ > +#define KVM_CPUID_BIT_IBPB_SUPPORT 12 > + > +static inline bool cpu_has_spec_ctrl(void) > +{ > + u32 eax, ebx, ecx, edx; > + cpuid_count(7, 0, &eax, &ebx, &ecx, &edx); > + > + return edx & bit(KVM_CPUID_BIT_SPEC_CTRL); > +} > + > +static inline bool cpu_has_ibpb_support(void) > +{ > + return cpuid_ebx(0x80000008) & bit(KVM_CPUID_BIT_IBPB_SUPPORT); > +} > + > static inline bool supports_cpuid_fault(struct kvm_vcpu *vcpu) > { > return vcpu->arch.msr_platform_info & MSR_PLATFORM_INFO_CPUID_FAULT; > -- Thanks, David / dhildenb