Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758531AbeAIOuN (ORCPT + 1 other); Tue, 9 Jan 2018 09:50:13 -0500 Received: from bhuna.collabora.co.uk ([46.235.227.227]:58388 "EHLO bhuna.collabora.co.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758655AbeAIOtZ (ORCPT ); Tue, 9 Jan 2018 09:49:25 -0500 From: Thierry Escande To: Rob Herring , Archit Taneja , Daniel Vetter , Neil Armstrong , Laurent Pinchart , Sandy Huang Cc: Jeffy Chen , Sean Paul , dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v7 8/8] drm/rockchip: dw_hdmi: Fix error handling path Date: Tue, 9 Jan 2018 15:48:53 +0100 Message-Id: <20180109144853.32536-9-thierry.escande@collabora.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180109144853.32536-1-thierry.escande@collabora.com> References: <20180109144853.32536-1-thierry.escande@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset = "utf-8" Content-Transfert-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: From: Jeffy Chen Add missing clk_disable_unprepare() in bind()'s error handling path and unbind(). Also inline clk_prepare_enable() with bind(). Fixes: 12b9f204e804 ("drm: bridge/dw_hdmi: add rockchip rk3288 support") Signed-off-by: Jeffy Chen Signed-off-by: Thierry Escande --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 791ab938f998..0b2c1a5dd1e6 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -193,13 +193,6 @@ static int rockchip_hdmi_parse_dt(struct rockchip_hdmi *hdmi) return PTR_ERR(hdmi->grf_clk); } - ret = clk_prepare_enable(hdmi->vpll_clk); - if (ret) { - DRM_DEV_ERROR(hdmi->dev, - "Failed to enable HDMI vpll: %d\n", ret); - return ret; - } - return 0; } @@ -374,6 +367,13 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, return ret; } + ret = clk_prepare_enable(hdmi->vpll_clk); + if (ret) { + DRM_DEV_ERROR(hdmi->dev, "Failed to enable HDMI vpll: %d\n", + ret); + return ret; + } + drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs); drm_encoder_init(drm, encoder, &dw_hdmi_rockchip_encoder_funcs, DRM_MODE_ENCODER_TMDS, NULL); @@ -381,6 +381,7 @@ static int dw_hdmi_rockchip_bind(struct device *dev, struct device *master, hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data); if (IS_ERR(hdmi->hdmi)) { encoder->funcs->destroy(encoder); + clk_disable_unprepare(hdmi->vpll_clk); return PTR_ERR(hdmi->hdmi); } @@ -396,6 +397,7 @@ static void dw_hdmi_rockchip_unbind(struct device *dev, struct device *master, dw_hdmi_unbind(hdmi->hdmi); hdmi->encoder.funcs->destroy(&hdmi->encoder); + clk_disable_unprepare(hdmi->vpll_clk); } static const struct component_ops dw_hdmi_rockchip_ops = { -- 2.14.1