Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754475AbeAJAjH (ORCPT + 1 other); Tue, 9 Jan 2018 19:39:07 -0500 Received: from aserp2120.oracle.com ([141.146.126.78]:53718 "EHLO aserp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752034AbeAJAjF (ORCPT ); Tue, 9 Jan 2018 19:39:05 -0500 MIME-Version: 1.0 Message-ID: <9e95b190-31e3-4a9a-9efe-8d153a81cf46@default> Date: Tue, 9 Jan 2018 16:33:47 -0800 (PST) From: Liran Alon To: Cc: , , , , , , , , Subject: Re: [PATCH 3/8] kvm: vmx: pass MSR_IA32_SPEC_CTRL and MSR_IA32_PRED_CMD down to the guest X-Mailer: Zimbra on Oracle Beehive Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Content-Disposition: inline X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=8769 signatures=668652 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1711220000 definitions=main-1801100007 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: ----- pbonzini@redhat.com wrote: > On 09/01/2018 17:48, Liran Alon wrote: > >>> > >>> + if (have_spec_ctrl) { > >>> + rdmsrl(MSR_IA32_SPEC_CTRL, vmx->spec_ctrl); > >>> + if (vmx->spec_ctrl != 0) > >>> + wrmsrl(MSR_IA32_SPEC_CTRL, 0); > > > > As I said also on the AMD patch, I think this is a bug. > > Intel specify that we should set IBRS bit even if it was already set > on every #VMExit. > > That's correct (though I'd like to understand _why_---I'm not > inclined > to blindly trust a spec), but for now it's saving a wrmsr of 0. That > is > quite obviously okay, and will be also okay after the bare-metal IBRS > patches. > > Of course the code will become something like > > if (using_ibrs || vmx->spec_ctrl != 0) > wrmsrl(MSR_IA32_SPEC_CTRL, host_ibrs); > > optimizing the case where the host is using retpolines. > > Paolo I agree with all the above. -Liran