Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933501AbeAJIjV (ORCPT + 1 other); Wed, 10 Jan 2018 03:39:21 -0500 Received: from mail-it0-f68.google.com ([209.85.214.68]:41383 "EHLO mail-it0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932963AbeAJIjT (ORCPT ); Wed, 10 Jan 2018 03:39:19 -0500 X-Google-Smtp-Source: ACJfBouo967Js0GEpR5JVZZvHb7GZxRid5Q7+Rh8JRFOUY/QX0ksmCcOKtVpPuXK+LfVEYtwS5HZyNpKIwPgYDqSF94= MIME-Version: 1.0 In-Reply-To: <1515472362-19979-1-git-send-email-leo.yan@linaro.org> References: <1515472362-19979-1-git-send-email-leo.yan@linaro.org> From: Vincent Guittot Date: Wed, 10 Jan 2018 09:38:57 +0100 Message-ID: Subject: Re: [PATCH] arm64: dts: Hi3660: Remove 'CPU_NAP' idle state To: Leo Yan Cc: Wei Xu , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , LAK , devicetree@vger.kernel.org, linux-kernel , Daniel Lezcano , Kevin Wang Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On 9 January 2018 at 05:32, Leo Yan wrote: > Thanks a lot for Vincent Guittot careful work to find bug for 'CPU_NAP' > idle state. At early time, the CPU CA73 CPU_NAP idle state has been > supported on Hikey960. Later we found the system has the hang issue > and for resolving this issue Hisilicon released new MCU firmware, but > unfortunately the new MCU firmware has side effect and results in the > CA73 CPU cannot really enter CPU_NAP state and roll back to WFI state. > > After discussion we cannot see the possibility to enable CA73 CPU_NAP > state anymore on Hikey960, based on this conclusion we should remove > this state from DT binding. > > Cc: Daniel Lezcano > Cc: Kevin Wang > Cc: Vincent Guittot > Signed-off-by: Leo Yan Tested-by: Vincent Guittot > --- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 32 ++++--------------------------- > 1 file changed, 4 insertions(+), 28 deletions(-) > > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > index ab0b95b..8fddf0d 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -96,11 +96,7 @@ > reg = <0x0 0x100>; > enable-method = "psci"; > next-level-cache = <&A73_L2>; > - cpu-idle-states = < > - &CPU_NAP > - &CPU_SLEEP > - &CLUSTER_SLEEP_1 > - >; > + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>; > }; > > cpu5: cpu@101 { > @@ -109,11 +105,7 @@ > reg = <0x0 0x101>; > enable-method = "psci"; > next-level-cache = <&A73_L2>; > - cpu-idle-states = < > - &CPU_NAP > - &CPU_SLEEP > - &CLUSTER_SLEEP_1 > - >; > + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>; > }; > > cpu6: cpu@102 { > @@ -122,11 +114,7 @@ > reg = <0x0 0x102>; > enable-method = "psci"; > next-level-cache = <&A73_L2>; > - cpu-idle-states = < > - &CPU_NAP > - &CPU_SLEEP > - &CLUSTER_SLEEP_1 > - >; > + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>; > }; > > cpu7: cpu@103 { > @@ -135,24 +123,12 @@ > reg = <0x0 0x103>; > enable-method = "psci"; > next-level-cache = <&A73_L2>; > - cpu-idle-states = < > - &CPU_NAP > - &CPU_SLEEP > - &CLUSTER_SLEEP_1 > - >; > + cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP_1>; > }; > > idle-states { > entry-method = "psci"; > > - CPU_NAP: cpu-nap { > - compatible = "arm,idle-state"; > - arm,psci-suspend-param = <0x0000001>; > - entry-latency-us = <7>; > - exit-latency-us = <2>; > - min-residency-us = <15>; > - }; > - > CPU_SLEEP: cpu-sleep { > compatible = "arm,idle-state"; > local-timer-stop; > -- > 2.7.4 >