Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934384AbeAJMB0 (ORCPT + 1 other); Wed, 10 Jan 2018 07:01:26 -0500 Received: from cloudserver094114.home.pl ([79.96.170.134]:49256 "EHLO cloudserver094114.home.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932218AbeAJMBY (ORCPT ); Wed, 10 Jan 2018 07:01:24 -0500 From: "Rafael J. Wysocki" To: ego@linux.vnet.ibm.com Cc: Balbir Singh , Shilpasri G Bhat , Viresh Kumar , Abhishek , Akshay Adiga , Michael Ellerman , Vaidyanathan Srinivasan , linux-pm@vger.kernel.org, "linux-kernel@vger.kernel.org" , "open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)" Subject: Re: [v3 PATCH 2/3] powernv-cpufreq: Fix pstate_to_idx() to handle non-continguous pstates Date: Wed, 10 Jan 2018 13:00:10 +0100 Message-ID: <8482639.QyQtvhC9hx@aspire.rjw.lan> In-Reply-To: <20180110085545.GA13666@in.ibm.com> References: <1513148261-21097-1-git-send-email-ego@linux.vnet.ibm.com> <20180110085545.GA13666@in.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Wednesday, January 10, 2018 9:55:45 AM CET Gautham R Shenoy wrote: > Hi Rafael, > > On Wed, Jan 03, 2018 at 11:47:58PM +1100, Balbir Singh wrote: > > On Wed, Jan 3, 2018 at 11:07 PM, Rafael J. Wysocki wrote: > > > On Monday, December 18, 2017 9:38:20 AM CET Gautham R Shenoy wrote: > > >> Hi Balbir, > > >> > > >> On Sun, Dec 17, 2017 at 02:15:25PM +1100, Balbir Singh wrote: > > >> > On Wed, Dec 13, 2017 at 5:57 PM, Gautham R. Shenoy > > >> > wrote: > > >> > > From: "Gautham R. Shenoy" > > >> > > > > >> > > The code in powernv-cpufreq, makes the following two assumptions which > > >> > > are not guaranteed by the device-tree bindings: > > >> > > > > >> > > 1) Pstate ids are continguous: This is used in pstate_to_idx() to > > >> > > obtain the reverse map from a pstate to it's corresponding > > >> > > entry into the cpufreq frequency table. > > >> > > > > >> > > 2) Every Pstate should always lie between the max and the min > > >> > > pstates that are explicitly reported in the device tree: This > > >> > > is used to determine whether a pstate reported by the PMSR is > > >> > > out of bounds. > > >> > > > > >> > > Both these assumptions are unwarranted and can change on future > > >> > > platforms. > > >> > > > >> > While this is a good thing, I wonder if it is worth the complexity. Pstates > > >> > are contiguous because they define transitions in incremental value > > >> > of change in frequency and I can't see how this can be broken in the > > >> > future? > > >> > > >> In the future, we can have the OPAL firmware give us a smaller set of > > >> pstates instead of expose every one of them. As it stands today, for > > >> most of the workloads, we will need at best 20-30 pstates and not > > >> beyond that. > > > > > > I'm not sure about the status here. > > > > > > Is this good to go as is or is it going to be updated? > > > > > > > I have no major objections, except some of the added complexity, but > > Gautham makes a point that this is refactoring for the future > > I have tested this across POWER8 and POWER9. The additional complexity > introduced by the second patch is required for the future when we are > going to reduce the number of pstates. I have applied the series, thanks!