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Date: Wed, 10 Jan 2018 23:13:41 +0100
From: Andrea Arcangeli <aarcange@redhat.com>
To: Tim Chen <tim.c.chen@linux.intel.com>
Cc: "Van De Ven, Arjan" <arjan.van.de.ven@intel.com>,
        David Woodhouse <dwmw2@infradead.org>,
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        Andy Lutomirski <luto@kernel.org>
Subject: Re: [patch RFC 5/5] x86/speculation: Add basic speculation control
 code
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On Wed, Jan 10, 2018 at 01:35:45PM -0800, Tim Chen wrote:
> time may not provide full protection on all cpu models.

All right no problem at all, it's fixed up.

Until very recently the majority of microcodes wasn't available in the
first place so I guess it's no big issue if in a subset of those the
IBRS barrier-like behavior wasn't immediately fully leveraged in all
cases. I'm just glad this detail was clarified sooner than later.

The IBRS barrier-like behavior and need to be set even when it's
already set, when changing mode to an higher privilege, is crystal
clear now.

Thanks,
Andrea