Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932569AbeAKGrh (ORCPT + 1 other); Thu, 11 Jan 2018 01:47:37 -0500 Received: from mail-pf0-f193.google.com ([209.85.192.193]:41336 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932292AbeAKGrc (ORCPT ); Thu, 11 Jan 2018 01:47:32 -0500 X-Google-Smtp-Source: ACJfBovjivQoJelCbwIpOAWi9fTFQbaF0CYbIsgzsyoZw1lnnj7d9BElxvZahJCPvTCnkdyCQl6Kqw== From: "Ji-Ze Hong (Peter Hong)" X-Google-Original-From: "Ji-Ze Hong (Peter Hong)" To: johan@kernel.org Cc: gregkh@linuxfoundation.org, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, peter_hong@fintek.com.tw, "Ji-Ze Hong (Peter Hong)" Subject: [PATCH V3 6/6] usb: serial: f81534: fix tx error on some baud rate Date: Thu, 11 Jan 2018 14:47:20 +0800 Message-Id: <1515653240-5420-6-git-send-email-hpeter+linux_kernel@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515653240-5420-1-git-send-email-hpeter+linux_kernel@gmail.com> References: <1515653240-5420-1-git-send-email-hpeter+linux_kernel@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: The F81532/534 had 4 clocksource 1.846/18.46/14.77/24MHz and baud rates can be up to 1.5Mbits with 24MHz. But on some baud rate (384~500kps), the TX side will send the data frame too close to treat frame error on RX side. This patch will force all TX data frame with delay 1bit gap. Signed-off-by: Ji-Ze Hong (Peter Hong) --- V3: 1: had not noticeable changes. V2: 1: First introduced in this series patches. drivers/usb/serial/f81534.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/usb/serial/f81534.c b/drivers/usb/serial/f81534.c index 08ef72ea2eec..92c9d8f18a5a 100644 --- a/drivers/usb/serial/f81534.c +++ b/drivers/usb/serial/f81534.c @@ -131,6 +131,8 @@ #define F81534_CLK_24_MHZ BIT(2) #define F81534_CLK_14_77_MHZ GENMASK(2, 1) #define F81534_CLK_MASK GENMASK(2, 1) +#define F81534_CLK_TX_DELAY_1BIT BIT(3) + #define F81534_CLK_RS485_MODE BIT(4) #define F81534_CLK_RS485_INVERT BIT(5) @@ -1386,7 +1388,11 @@ static int f81534_port_probe(struct usb_serial_port *port) if (!port_priv) return -ENOMEM; - port_priv->shadow_clk = F81534_UART_EN; + /* + * We'll make tx frame error when baud rate from 384~500kps. So we'll + * delay all tx data frame with 1bit. + */ + port_priv->shadow_clk = F81534_UART_EN | F81534_CLK_TX_DELAY_1BIT; spin_lock_init(&port_priv->msr_lock); mutex_init(&port_priv->mcr_mutex); mutex_init(&port_priv->lcr_mutex); -- 2.7.4