Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965782AbeAKT4Y (ORCPT + 1 other); Thu, 11 Jan 2018 14:56:24 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:35105 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934786AbeAKT4W (ORCPT ); Thu, 11 Jan 2018 14:56:22 -0500 X-Google-Smtp-Source: ACJfBosBLrfxGjB2Lkug/C8fFAR130NRgF8XyyAg60uvM+sbBIv0Nv3IfRi0DCgkNMiCOQZFoGnAjO+qRJ1F9j1wBpg= MIME-Version: 1.0 In-Reply-To: <73078b7c-c3dd-0927-a82a-fb9369f5b576@codeaurora.org> References: <20180110015848.11480-1-sboyd@codeaurora.org> <20180110015848.11480-3-sboyd@codeaurora.org> <73078b7c-c3dd-0927-a82a-fb9369f5b576@codeaurora.org> From: Grant Likely Date: Thu, 11 Jan 2018 19:56:01 +0000 X-Google-Sender-Auth: RM5E5JJaXyCbA9q5LHfZfvtgXB4 Message-ID: Subject: Re: [PATCH 2/3] dt-bindings: pinctrl: Add a ngpios-ranges property To: Timur Tabi Cc: Linus Walleij , Stephen Boyd , Rob Herring , "linux-kernel@vger.kernel.org" , linux-arm-msm@vger.kernel.org, Linux ARM , Andy Shevchenko , Bjorn Andersson , linux-gpio@vger.kernel.org, "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: On Thu, Jan 11, 2018 at 4:36 PM, Timur Tabi wrote: > On 01/11/2018 10:33 AM, Grant Likely wrote: >> >> What level of access control is implemented here? Is there access >> control for each GPIO individually, or is it done by banks of GPIOs? >> Just asking to make sure I understand the problem domain. > > > On our ACPI system, it's specific GPIOs. Each GPIO is in its own 64k page, > which is what allows us to block specific ones. Okay, thanks. g. > > -- > Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm > Technologies, Inc. Qualcomm Technologies, Inc. is a member of the > Code Aurora Forum, a Linux Foundation Collaborative Project.