Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933457AbeALBdp (ORCPT + 1 other); Thu, 11 Jan 2018 20:33:45 -0500 Received: from mga11.intel.com ([192.55.52.93]:45984 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932471AbeALBcX (ORCPT ); Thu, 11 Jan 2018 20:32:23 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,346,1511856000"; d="scan'208";a="10605997" From: Ashok Raj To: linux-kernel@vger.kernel.org, Thomas Gleixner , Tim Chen , Andy Lutomirski , Linus Torvalds , Greg KH Cc: Ashok Raj , Dave Hansen , Andrea Arcangeli , Andi Kleen , Arjan Van De Ven , David Woodhouse , Peter Zijlstra , Dan Williams , Paolo Bonzini , Jun Nakajima , Asit Mallick Subject: [PATCH 2/5] x86/ibrs: Add new helper macros to save/restore MSR_IA32_SPEC_CTRL Date: Thu, 11 Jan 2018 17:32:16 -0800 Message-Id: <1515720739-43819-3-git-send-email-ashok.raj@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515720739-43819-1-git-send-email-ashok.raj@intel.com> References: <1515720739-43819-1-git-send-email-ashok.raj@intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Add some helper macros to save/restore MSR_IA32_SPEC_CTRL. Although we could use the spec_ctrl_unprotected_begin/end macros they seem be bit unreadable for some uses. spec_ctrl_get - read MSR_IA32_SPEC_CTRL to save spec_ctrl_set - write value restore MSR_IA32_SPEC_CTRL spec_ctrl_restriction_off - same as spec_ctrl_unprotected_begin spec_ctrl_restriction_on - same as spec_ctrl_unprotected_end Signed-off-by: Ashok Raj --- arch/x86/include/asm/spec_ctrl.h | 12 ++++++++++++ arch/x86/kernel/cpu/spec_ctrl.c | 11 +++++++++++ 2 files changed, 23 insertions(+) diff --git a/arch/x86/include/asm/spec_ctrl.h b/arch/x86/include/asm/spec_ctrl.h index 2dfa31b..926feb2 100644 --- a/arch/x86/include/asm/spec_ctrl.h +++ b/arch/x86/include/asm/spec_ctrl.h @@ -9,6 +9,10 @@ void spec_ctrl_scan_feature(struct cpuinfo_x86 *c); void spec_ctrl_unprotected_begin(void); void spec_ctrl_unprotected_end(void); +void spec_ctrl_set(u64 val); + +#define spec_ctrl_restriction_on spec_ctrl_unprotected_end +#define spec_ctrl_restriction_off spec_ctrl_unprotected_begin static inline u64 native_rdmsrl(unsigned int msr) { @@ -34,4 +38,12 @@ static inline void __enable_indirect_speculation(void) native_wrmsrl(MSR_IA32_SPEC_CTRL, SPEC_CTRL_DISABLE_IBRS); } +static inline u64 spec_ctrl_get(void) +{ + u64 val; + + val = native_rdmsrl(MSR_IA32_SPEC_CTRL); + + return val; +} #endif /* _ASM_X86_SPEC_CTRL_H */ diff --git a/arch/x86/kernel/cpu/spec_ctrl.c b/arch/x86/kernel/cpu/spec_ctrl.c index 9e9d013..02fc630 100644 --- a/arch/x86/kernel/cpu/spec_ctrl.c +++ b/arch/x86/kernel/cpu/spec_ctrl.c @@ -47,3 +47,14 @@ void spec_ctrl_unprotected_end(void) __disable_indirect_speculation(); } EXPORT_SYMBOL_GPL(spec_ctrl_unprotected_end); + +void spec_ctrl_set(u64 val) +{ + if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) { + if (!val) { + spec_ctrl_restriction_off(); + } else + spec_ctrl_restriction_on(); + } +} +EXPORT_SYMBOL(spec_ctrl_set); -- 2.7.4