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Subject: Re: [PATCH 3/5] x86/ibrs: Add direct access support for
 MSR_IA32_SPEC_CTRL
To: Ashok Raj <ashok.raj@intel.com>, linux-kernel@vger.kernel.org,
        Thomas Gleixner <tglx@linutronix.de>,
        Tim Chen <tim.c.chen@linux.intel.com>,
        Andy Lutomirski <luto@kernel.org>,
        Linus Torvalds <torvalds@linux-foundation.org>,
        Greg KH <gregkh@linuxfoundation.org>
References: <1515720739-43819-1-git-send-email-ashok.raj@intel.com>
 <1515720739-43819-4-git-send-email-ashok.raj@intel.com>
Cc: Andrea Arcangeli <aarcange@redhat.com>,
        Andi Kleen <ak@linux.intel.com>,
        Arjan Van De Ven <arjan.van.de.ven@intel.com>,
        David Woodhouse <dwmw@amazon.co.uk>,
        Peter Zijlstra <peterz@infradead.org>,
        Dan Williams <dan.j.williams@intel.com>,
        Paolo Bonzini <pbonzini@redhat.com>,
        Jun Nakajima <jun.nakajima@intel.com>,
        Asit Mallick <asit.k.mallick@intel.com>
From: Dave Hansen <dave.hansen@intel.com>
Message-ID: <bb8dcd84-568b-ad74-92c2-646f0d5188a6@intel.com>
Date: Thu, 11 Jan 2018 17:58:11 -0800
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On 01/11/2018 05:32 PM, Ashok Raj wrote:
> +static void save_guest_spec_ctrl(struct vcpu_vmx *vmx)
> +{
> +	if (boot_cpu_has(X86_FEATURE_SPEC_CTRL)) {
> +		vmx->spec_ctrl = spec_ctrl_get();
> +		spec_ctrl_restriction_on();
> +	} else
> +		rmb();
> +}

Does this need to be "ifence()"?  Better yet, do we just need to create
a helper for boot_cpu_has(X86_FEATURE_SPEC_CTRL) that does the barrier?