Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934150AbeALOX5 (ORCPT + 1 other); Fri, 12 Jan 2018 09:23:57 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:52612 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933687AbeALOXy (ORCPT ); Fri, 12 Jan 2018 09:23:54 -0500 X-IronPort-AV: E=Sophos;i="5.46,349,1511852400"; d="scan'208";a="10394891" From: Claudiu Beznea To: , , , , , , , , , CC: , , , , , , , Claudiu Beznea Subject: [PATCH v2 06/16] ARM: dts: pxa: update pwm-cells Date: Fri, 12 Jan 2018 16:22:53 +0200 Message-ID: <1515766983-15151-7-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> References: <1515766983-15151-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Update pwm-cells to 2 to allow initialization of channel number an period. Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/pxa25x.dtsi | 4 ++-- arch/arm/boot/dts/pxa27x.dtsi | 8 ++++---- arch/arm/boot/dts/pxa3xx.dtsi | 8 ++++---- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/pxa25x.dtsi b/arch/arm/boot/dts/pxa25x.dtsi index 95d59be97213..8c55b3552c42 100644 --- a/arch/arm/boot/dts/pxa25x.dtsi +++ b/arch/arm/boot/dts/pxa25x.dtsi @@ -70,14 +70,14 @@ pwm0: pwm@40b00000 { compatible = "marvell,pxa250-pwm"; reg = <0x40b00000 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM0>; }; pwm1: pwm@40b00010 { compatible = "marvell,pxa250-pwm"; reg = <0x40b00010 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM1>; }; }; diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi index 747f750f675d..e3db171cfeb1 100644 --- a/arch/arm/boot/dts/pxa27x.dtsi +++ b/arch/arm/boot/dts/pxa27x.dtsi @@ -46,28 +46,28 @@ pwm0: pwm@40b00000 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40b00000 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM0>; }; pwm1: pwm@40b00010 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40b00010 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM1>; }; pwm2: pwm@40c00000 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40c00000 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM0>; }; pwm3: pwm@40c00010 { compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm"; reg = <0x40c00010 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM1>; }; diff --git a/arch/arm/boot/dts/pxa3xx.dtsi b/arch/arm/boot/dts/pxa3xx.dtsi index 55c75b67351c..1f37295b05a3 100644 --- a/arch/arm/boot/dts/pxa3xx.dtsi +++ b/arch/arm/boot/dts/pxa3xx.dtsi @@ -200,7 +200,7 @@ pwm0: pwm@40b00000 { compatible = "marvell,pxa270-pwm"; reg = <0x40b00000 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM0>; status = "disabled"; }; @@ -208,7 +208,7 @@ pwm1: pwm@40b00010 { compatible = "marvell,pxa270-pwm"; reg = <0x40b00010 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM1>; status = "disabled"; }; @@ -216,7 +216,7 @@ pwm2: pwm@40c00000 { compatible = "marvell,pxa270-pwm"; reg = <0x40c00000 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM0>; status = "disabled"; }; @@ -224,7 +224,7 @@ pwm3: pwm@40c00010 { compatible = "marvell,pxa270-pwm"; reg = <0x40c00010 0x10>; - #pwm-cells = <1>; + #pwm-cells = <2>; clocks = <&clks CLK_PWM1>; status = "disabled"; }; -- 2.7.4