Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752100AbeANRJ1 (ORCPT + 1 other); Sun, 14 Jan 2018 12:09:27 -0500 Received: from smtp-fw-6001.amazon.com ([52.95.48.154]:34906 "EHLO smtp-fw-6001.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750831AbeANRJ0 (ORCPT ); Sun, 14 Jan 2018 12:09:26 -0500 X-Amazon-filename: smime.p7s X-IronPort-AV: E=Sophos;i="5.46,359,1511827200"; d="p7s'?scan'208";a="327775239" Message-ID: <1515949719.22147.42.camel@amazon.co.uk> Subject: Re: [PATCH v2] x86/retpoline: Add LFENCE to the retpoline/RSB filling RSB macros To: Borislav Petkov , Tom Lendacky CC: , , Rik van Riel , Andi Kleen , Josh Poimboeuf , Peter Zijlstra , "Linus Torvalds" , Jiri Kosina , Dan Williams , Dave Hansen , Andy Lutomirski , Kees Cook , "Thomas Gleixner" , Tim Chen , "Greg Kroah-Hartman" , Paul Turner In-Reply-To: <20180114154108.3og4oqascfawy4oe@pd.tnic> References: <20180113232730.31060.36287.stgit@tlendack-t1.amdoffice.net> <20180114154108.3og4oqascfawy4oe@pd.tnic> Face: iVBORw0KGgoAAAANSUhEUgAAADAAAAAwBAMAAAClLOS0AAAAG1BMVEUHBwcUFBQpKSlGRkZhYWF9fX2Xl5eysrLMzMxFF+rXAAACaElEQVQ4y21UQXbbIBQE9wJALmAg6ToWON22FrhZthHgbvssUPathC7QWMful2JHSmtWwGg+zPxBCE0DU4QoJQgRgsg4w2gJjBNE8PjFBZgnQMBs+uZ1NQNQjZO3BV4AGDFC0f+l4DBG0VUAM4yv7SO8IgRdHXQ+A78HKL5OAeCfNQV5cHX8DsBUyIJKtYbt98BKaGNCKjfgFVkqYVLbkHKsRsbSCSa0T6npIqLrpRBgQKHUpQmgs9eEKaiUcooE8WWfCGVnBiUcn1uF2XhbfmN9apKnmMP2K4kizKkQWxuaVNOpU2cACIyxO1Po8ETHcXEDMVnozcejkAYA9iaD4pU0ZvNQ8VurNnTuFAYVtuIPUZW25PjDIjQAlGyffIiRQxoWAZBmJ0LTdW2Nyc0iP3DqRhxizvGJkBWZmyFVyZkddWzmBoIBVMpCCJ1CFzl98xav4VJKSSD45KbUT75ixikTphDSRh8+Uz7JLgUTAgAFwzqzjxc/nDY7WUApqY0OMdTwCKZSXplSKkgIRCHElCp8ZnhnKqXuwcNbk1L0VXE+I9alUXoHlLHl3mv7/dWQlJwtjREC7mu9L/U2jQyMUuO2EDS4q9Kl2ddm232bxIE5pjJuVwiljNn/Cfv25/T0cu5cZbwHGVq7h/zp0B4n3S99V/utD+Uo8BiGx9xCsOAV5z7/tjo4Z4z1Lvb90KZ7eFOoOeXOukqF2seo234YYuaQPpRP+cVZU5adT1Edun5Iz3z8fTz3+eSDh0Ip1c7zx1MaijGzTd/3MbRuBHz8cvcVgCMBRpOHvgu59WDhoat+nIZm+LWm9C/aaaGq5DCP9QAAAABJRU5ErkJggg== Organization: Amazon Content-Type: multipart/signed; micalg=sha-256; protocol="application/x-pkcs7-signature"; boundary="=-O0illnAdHzNMckCfiEnL" Date: Sun, 14 Jan 2018 18:08:39 +0100 X-Mailer: Evolution 3.18.5.2-0ubuntu3.2 MIME-Version: 1.0 From: "Woodhouse, David" X-Evolution-Source: 1481217574.17989.4@uc8d3ff76b9bc5848a9cc Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: --=-O0illnAdHzNMckCfiEnL Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, 2018-01-14 at 16:41 +0100, Borislav Petkov wrote: > On Sat, Jan 13, 2018 at 05:27:30PM -0600, Tom Lendacky wrote: > >=20 > > The PAUSE instruction is currently used in the retpoline and RSB fillin= g > > macros as a speculation trap.=C2=A0=C2=A0The use of PAUSE was originall= y suggested > > because it showed a very, very small difference in the amount of > > cycles/time used to execute the retpoline as compared to LFENCE.=C2=A0= =C2=A0On AMD, > > the PAUSE instruction is not a serializing instruction, so the pause/jm= p > > loop will use excess power as it is speculated over waiting for return > > to mispredict to the correct target. > >=20 > > The RSB filling macro is applicable to AMD, and, if software is unable = to > > verify that LFENCE is serializing on AMD (possible when running under a > > hypervisor), the generic retpoline support will be used and, so, is als= o > > applicable to AMD.=C2=A0=C2=A0Keep the current usage of PAUSE for Intel= , but add an > > LFENCE instruction to the speculation trap for AMD. > >=20 > > Signed-off-by: Tom Lendacky > > --- > > =C2=A0arch/x86/include/asm/nospec-branch.h |=C2=A0=C2=A0=C2=A0=C2=A06 += ++++- > > =C2=A01 file changed, 5 insertions(+), 1 deletion(-) > > Reviewed-by: Borislav Petkov Acked-by: Arjan van de Ven Acked-by: David Woodhouse --=-O0illnAdHzNMckCfiEnL Content-Type: application/x-pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; 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