Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934173AbeAOF6C (ORCPT + 1 other); Mon, 15 Jan 2018 00:58:02 -0500 Received: from mail-pl0-f65.google.com ([209.85.160.65]:38989 "EHLO mail-pl0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934015AbeAOF55 (ORCPT ); Mon, 15 Jan 2018 00:57:57 -0500 X-Google-Smtp-Source: ACJfBot5mvbPPhoYUvYYl8rQFKv3rdBkfDff4Qp9t4uzwaPmpM5u3J17AronkgZmkYnrQusTSnRlew== From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org, geert.uytterhoeven@gmail.com, linus.walleij@linaro.org, mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com, rdunlap@infradead.org, davem@davemloft.net, jonas@southpole.se, stefan.kristiansson@saunalahti.fi, shorne@gmail.com Cc: Rick Chen , green.hu@gmail.com, rick@andestech.com, Vincent Chen Subject: [PATCH v6 2/3] clocksource/drivers/atcpit100: VDSO support Date: Mon, 15 Jan 2018 13:57:30 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: From: Rick Chen VDSO needs real-time cycle count to ensure the time accuracy. Unlike others, nds32 architecture does not define clock source, hence VDSO needs atcpit100 offering real-time cycle count to derive the correct time. Signed-off-by: Vincent Chen Signed-off-by: Rick Chen Signed-off-by: Greentime Hu --- drivers/clocksource/timer-atcpit100.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/clocksource/timer-atcpit100.c b/drivers/clocksource/timer-atcpit100.c index e34b2fe..4cf69e2 100644 --- a/drivers/clocksource/timer-atcpit100.c +++ b/drivers/clocksource/timer-atcpit100.c @@ -18,6 +18,9 @@ #include #include #include "timer-of.h" +#ifdef CONFIG_NDS32 +#include +#endif /* * Definition of register offsets @@ -200,6 +203,17 @@ static u64 notrace atcpit100_timer_sched_read(void) return ~readl(timer_of_base(&to) + CH1_CNT); } +#ifdef CONFIG_NDS32 +static void fill_vdso_need_info(struct device_node *node) +{ + struct resource timer_res; + of_address_to_resource(node, 0, &timer_res); + timer_info.mapping_base = (unsigned long)timer_res.start; + timer_info.cycle_count_down = true; + timer_info.cycle_count_reg_offset = CH1_CNT; +} +#endif + static int __init atcpit100_timer_init(struct device_node *node) { int ret; @@ -238,6 +252,10 @@ static int __init atcpit100_timer_init(struct device_node *node) val = readl(base + INT_EN); writel(val | CH0INT0EN, base + INT_EN); +#ifdef CONFIG_NDS32 + fill_vdso_need_info(node); +#endif + return ret; } -- 1.7.9.5