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Subject: Re: Improve retpoline for Skylake
From: Andy Lutomirski <luto@amacapital.net>
In-Reply-To: <445ec6c6-a835-fbdc-dca3-222a73d19816@citrix.com>
Date: Mon, 15 Jan 2018 10:06:35 -0800
Cc: Jon Masters <jcm@jonmasters.org>,
        Henrique de Moraes Holschuh <hmh@hmh.eng.br>,
        Andi Kleen <andi@firstfloor.org>,
        David Woodhouse <dwmw2@infradead.org>, tglx@linutronix.de,
        x86@kernel.org, linux-kernel@vger.kernel.org, pjt@google.com,
        torvalds@linux-foundation.org, gregkh@linux-foundation.org,
        peterz@infradead.org, thomas.lendacky@amd.com,
        arjan.van.de.ven@intel.com
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References: <20180112184550.6573-1-andi@firstfloor.org> <1515784373.22302.492.camel@infradead.org> <20180112192126.su2evwfefdfeaa6g@two.firstfloor.org> <20180112220349.7dorb3lde4tffsjm@khazad-dum.debian.net> <985f979e-0740-5d8a-d6b8-b023105aa021@jonmasters.org> <DC2DB4E2-896B-4C5B-981F-4DE3EBB2EDC9@amacapital.net> <445ec6c6-a835-fbdc-dca3-222a73d19816@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Sender: linux-kernel-owner@vger.kernel.org


> On Jan 15, 2018, at 9:38 AM, Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> 
>> On 15/01/18 16:57, Andy Lutomirski wrote:
>> 
>>>> On Jan 15, 2018, at 12:26 AM, Jon Masters <jcm@jonmasters.org> wrote:
>>>> 
>>>> On 01/12/2018 05:03 PM, Henrique de Moraes Holschuh wrote:
>>>> On Fri, 12 Jan 2018, Andi Kleen wrote:
>>>>>> Skylake still loses if it takes an SMI, right? 
>>>>> SMMs are usually rare, especially on servers, and are usually
>>>>> not very predictible, and even if you have
>>>> FWIW, a data point: SMIs can be generated on demand by userspace on
>>>> thinkpad laptops, but they will be triggered from within a kernel
>>>> context.  I very much doubt this is a rare pattern...
>>> Sure. Just touch some "legacy" hardware that the vendor emulates in a
>>> nasty SMI handler. It's definitely not acceptable to assume that SMIs
>>> can't be generated under the control of some malicious user code.
>>> 
>>> Our numbers on Skylake weren't bad, and there seem to be all kinds of
>>> corner cases, so again, it seems as if IBRS is the safest choice.
>>> 
>> And keep in mind that SMIs generally hit all CPUs at once, making them extra nasty.
>> 
>> Can we get firmware vendors to refill the return buffer just before RSM?
> 
> Refill or not, you are aware that a correctly timed SMI in a leaf
> function will cause the next ret to speculate into userspace, because
> there is guaranteed peturbance in the RSB?  (On the expectation that the
> SMM handler isn't entirely devoid of function calls).

Couldn't firmware fill the RSB with a some known safe address, maybe even 0, and then immediately do RSM?


> 
> Having firmware refill the RSB only makes a difference if you are on
> Skylake+ were RSB underflows are bad, and you're not using IBRS to
> protect your indirect predictions.
> 
> ~Andrew