Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751611AbeAPD43 (ORCPT + 1 other); Mon, 15 Jan 2018 22:56:29 -0500 Received: from terminus.zytor.com ([65.50.211.136]:46751 "EHLO terminus.zytor.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751047AbeAPD42 (ORCPT ); Mon, 15 Jan 2018 22:56:28 -0500 Date: Mon, 15 Jan 2018 19:52:59 -0800 From: tip-bot for Mike Travis Message-ID: Cc: torvalds@linux-foundation.org, abanman@hpe.com, sivanich@hpe.com, tglx@linutronix.de, linux-kernel@vger.kernel.org, rja@hpe.com, peterz@infradead.org, mingo@kernel.org, mike.travis@hpe.com, hpa@zytor.com, akpm@linux-foundation.org Reply-To: linux-kernel@vger.kernel.org, tglx@linutronix.de, sivanich@hpe.com, torvalds@linux-foundation.org, abanman@hpe.com, akpm@linux-foundation.org, mike.travis@hpe.com, hpa@zytor.com, rja@hpe.com, mingo@kernel.org, peterz@infradead.org In-Reply-To: <1515440405-20880-3-git-send-email-mike.travis@hpe.com> References: <1515440405-20880-3-git-send-email-mike.travis@hpe.com> To: linux-tip-commits@vger.kernel.org Subject: [tip:x86/platform] x86/platform/UV: Fix UV4A support on new Intel Processors Git-Commit-ID: 62807106c3219d2d6ddbfc778a5ee7e6ba38e58f X-Mailer: tip-git-log-daemon Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: Commit-ID: 62807106c3219d2d6ddbfc778a5ee7e6ba38e58f Gitweb: https://git.kernel.org/tip/62807106c3219d2d6ddbfc778a5ee7e6ba38e58f Author: Mike Travis AuthorDate: Mon, 8 Jan 2018 13:40:00 -0600 Committer: Ingo Molnar CommitDate: Tue, 16 Jan 2018 03:58:37 +0100 x86/platform/UV: Fix UV4A support on new Intel Processors Upcoming Intel CascadeLake and IceLake processors have some architecture changes that required fixes in the UV4 HUB bringing that chip to revision 2. The nomenclature for that new chip is "UV4A". This patch fixes the references for the expanded MMR definitions in the previous (automated) patch. Signed-off-by: Mike Travis Acked-by: Andrew Banman Cc: Andrew Morton Cc: Dimitri Sivanich Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Russ Anderson Cc: Thomas Gleixner Link: http://lkml.kernel.org/r/1515440405-20880-3-git-send-email-mike.travis@hpe.com Signed-off-by: Ingo Molnar --- arch/x86/kernel/apic/x2apic_uv_x.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 6de35fc..ebb7d26 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -768,6 +768,7 @@ static __init void map_gru_high(int max_pnode) return; } + /* Only UV3 has distributed GRU mode */ if (is_uv3_hub() && gru.s3.mode) { map_gru_distributed(gru.v); return; @@ -817,17 +818,20 @@ static __initdata struct mmioh_config mmiohs[] = { /* UV3 & UV4 have identical MMIOH overlay configs */ static __init void map_mmioh_high_uv3(int index, int min_pnode, int max_pnode) { - union uv3h_rh_gam_mmioh_overlay_config0_mmr_u overlay; + union uvh_rh_gam_mmioh_overlay_config0_mmr_u overlay; unsigned long mmr; unsigned long base; + unsigned long m_overlay; int i, n, shift, m_io, max_io; int nasid, lnasid, fi, li; char *id; id = mmiohs[index].id; overlay.v = uv_read_local_mmr(mmiohs[index].overlay); + m_overlay = mmiohs[index].overlay; - pr_info("UV: %s overlay 0x%lx base:0x%x m_io:%d\n", id, overlay.v, overlay.s3.base, overlay.s3.m_io); + pr_info("UV: %s overlay 0x%lx(@0x%lx) base:0x%x m_io:%d\n", + id, overlay.v, m_overlay, overlay.s3.base, overlay.s3.m_io); if (!overlay.s3.enable) { pr_info("UV: %s disabled\n", id); return; @@ -844,10 +848,14 @@ static __init void map_mmioh_high_uv3(int index, int min_pnode, int max_pnode) max_io = lnasid = fi = li = -1; for (i = 0; i < n; i++) { - union uv3h_rh_gam_mmioh_redirect_config0_mmr_u redirect; + union uvh_rh_gam_mmioh_redirect_config0_mmr_u redirect; + unsigned long m_redirect = mmr + i * 8; redirect.v = uv_read_local_mmr(mmr + i * 8); nasid = redirect.s3.nasid; + printk_once(KERN_INFO + "UV: %s redirect 0x%lx(@0x%lx) 0x%04x\n", + id, redirect.v, m_redirect, nasid); /* Invalid NASID: */ if (nasid < min_pnode || max_pnode < nasid) nasid = -1;