Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751508AbeAPQsw (ORCPT + 1 other); Tue, 16 Jan 2018 11:48:52 -0500 Received: from 8bytes.org ([81.169.241.247]:54828 "EHLO theia.8bytes.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751446AbeAPQsg (ORCPT ); Tue, 16 Jan 2018 11:48:36 -0500 From: Joerg Roedel To: Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, Linus Torvalds , Andy Lutomirski , Dave Hansen , Josh Poimboeuf , Juergen Gross , Peter Zijlstra , Borislav Petkov , Jiri Kosina , Boris Ostrovsky , Brian Gerst , David Laight , Denys Vlasenko , Eduardo Valentin , Greg KH , Will Deacon , aliguori@amazon.com, daniel.gruss@iaik.tugraz.at, hughd@google.com, keescook@google.com, Andrea Arcangeli , Waiman Long , jroedel@suse.de, joro@8bytes.org Subject: [PATCH 12/16] x86/mm/pae: Populate the user page-table with user pgd's Date: Tue, 16 Jan 2018 17:36:55 +0100 Message-Id: <1516120619-1159-13-git-send-email-joro@8bytes.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516120619-1159-1-git-send-email-joro@8bytes.org> References: <1516120619-1159-1-git-send-email-joro@8bytes.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Return-Path: From: Joerg Roedel This is the last part of the PAE page-table setup for PAE before we can add the CR3 switch to the entry code. Signed-off-by: Joerg Roedel --- arch/x86/include/asm/pgtable-3level.h | 3 +++ arch/x86/mm/pti.c | 7 +++++++ 2 files changed, 10 insertions(+) diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h index bc4af5453802..910f0b35370e 100644 --- a/arch/x86/include/asm/pgtable-3level.h +++ b/arch/x86/include/asm/pgtable-3level.h @@ -98,6 +98,9 @@ static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd) static inline void native_set_pud(pud_t *pudp, pud_t pud) { +#ifdef CONFIG_PAGE_TABLE_ISOLATION + pud.p4d.pgd = pti_set_user_pgd(&pudp->p4d.pgd, pud.p4d.pgd); +#endif set_64bit((unsigned long long *)(pudp), native_pud_val(pud)); } diff --git a/arch/x86/mm/pti.c b/arch/x86/mm/pti.c index 6b6bfd13350e..a561b5625d6c 100644 --- a/arch/x86/mm/pti.c +++ b/arch/x86/mm/pti.c @@ -122,6 +122,7 @@ pgd_t __pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) */ kernel_to_user_pgdp(pgdp)->pgd = pgd.pgd; +#ifdef CONFIG_X86_64 /* * If this is normal user memory, make it NX in the kernel * pagetables so that, if we somehow screw up and return to @@ -134,10 +135,16 @@ pgd_t __pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) * may execute from it * - we don't have NX support * - we're clearing the PGD (i.e. the new pgd is not present). + * - We run on a 32 bit kernel. 2-level paging doesn't support NX at + * all and PAE paging does not support it on the PGD level. We can + * set it in the PMD level there in the future, but that means we + * need to unshare the PMDs between the kernel and the user + * page-tables. */ if ((pgd.pgd & (_PAGE_USER|_PAGE_PRESENT)) == (_PAGE_USER|_PAGE_PRESENT) && (__supported_pte_mask & _PAGE_NX)) pgd.pgd |= _PAGE_NX; +#endif /* return the copy of the PGD we want the kernel to use: */ return pgd; -- 2.13.6