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Date: Tue, 16 Jan 2018 20:41:12 +0100
From: Joerg Roedel <joro@8bytes.org>
To: Dave Hansen <dave.hansen@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@kernel.org>,
        "H . Peter Anvin" <hpa@zytor.com>, x86@kernel.org,
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        Andrea Arcangeli <aarcange@redhat.com>,
        Waiman Long <llong@redhat.com>, jroedel@suse.de
Subject: Re: [PATCH 10/16] x86/mm/pti: Populate valid user pud entries
Message-ID: <20180116194112.GD28161@8bytes.org>
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On Tue, Jan 16, 2018 at 10:06:48AM -0800, Dave Hansen wrote:
> On 01/16/2018 08:36 AM, Joerg Roedel wrote:
> > 
> > In PAE page-tables at the top-level most bits we usually set
> > with _KERNPG_TABLE are reserved, resulting in a #GP when
> > they are loaded by the processor.
> 
> Can you save me the trip to the SDM and remind me which bits actually
> cause trouble here?

Everything besides PRESENT, PCD, PWT and the actual physical address, so
RW, and NX for example cause a #GP.


	Joerg