Subject: Re: [PATCH v2] arm64: Branch predictor hardening for Cavium ThunderX2
To: Jayachandran C <jnair@caviumnetworks.com>,
        Will Deacon <will.deacon@arm.com>
References: <20180108164651.GQ25869@arm.com>
 <1515502022-7376-1-git-send-email-jnair@caviumnetworks.com>
Cc: marc.zyngier@arm.com, linux-arm-kernel@lists.infradead.org,
        lorenzo.pieralisi@arm.com, ard.biesheuvel@linaro.org,
        catalin.marinas@arm.com, linux-kernel@vger.kernel.org,
        labbott@redhat.com, christoffer.dall@linaro.org
Newsgroups: gmane.linux.kernel,gmane.linux.ports.arm.kernel
From: Jon Masters <jcm@jonmasters.org>
Organization: World Organi{s,z}ation of Broken Dreams
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Date: Tue, 16 Jan 2018 16:50:38 -0500
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On 01/09/2018 07:47 AM, Jayachandran C wrote:
> Use PSCI based mitigation for speculative execution attacks targeting
> the branch predictor. The approach is similar to the one used for
> Cortex-A CPUs, but in case of ThunderX2 we add another SMC call to
> test if the firmware supports the capability.
> 
> If the secure firmware has been updated with the mitigation code to
> invalidate the branch target buffer, we use the PSCI version call to
> invoke it.

What's the status of this patch for TX2? Previously you were holding on
the new SMC number, but I think the consensus was to pull this in now?

Jon.

-- 
Computer Architect